參數(shù)資料
型號： S1C6N3B0D0A0100
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, UUC54
封裝： DIE-54
文件頁數(shù)： 6/79頁
文件大?。?/td> 606K
代理商： S1C6N3B0D0A0100
6
EPSON
S1C6N3B0 TECHNICAL MANUAL
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
2.1.1 Voltage <VD1> for oscillation circuit and internal circuits
VD1 is a voltage for the oscillation circuit and the internal logic circuits.
VD1 is driven with the supply voltage VDD in the normal operating mode.
The S1C6N3B0 can be set in the heavy load protection mode to protect the IC operation from voltage
variation when heavy loads such as a buzzer is driven and to operate in a condition of VDD
≤ 1.1 V (see
Section 4.10 for detail). In the heavy protection mode, the S1C6N3B0 drives VD1 with the boosted voltage
VC2 (explained in the next section) for stabilizing operation in low supply voltage.
The S1C6A3B0 always drives VD1 with the supply voltage VDD.
2.1.2 Voltage <VC1–VC3> for LCD driving
VC1–VC3 are the LCD drive voltages. They can be generated by the internal LCD system power supply
circuit or can be supplied from outside by selecting mask option.
The LCD system power supply circuit consists of two voltage circuits: a voltage regulator that generates
the VC1 voltage and a voltage booster circuit that generates the VC2 and VC3 voltages by doubling and
tripling the VC1 (when the internal voltage regulator is selected as the LCD power source by mask
option).
The LCD system power supply circuit stops operating in the SLEEP mode (available for the CR oscilla-
tion model of the S1C6N3B0 and S1C6A3B0). The voltages VC1 to VC3 go to VSS level when it stops. (The
SLEEP function cannot be used when an external LCD power supply is selected.)
In the heavy load protection mode in the S1C6N3B0, the VC2 is also used for driving the oscillation
system voltage regulator.
2.2 Initial Reset
To initialize the S1C6N3B0 Series circuits, an initial reset must be executed. There are three ways of doing
this.
(1) External initial reset by simultaneous low input to terminals K00–K03 (depending on mask option)
(2) External initial reset via the RESET terminal
(3) Initial reset by the oscillation detection circuit
Figure 2.2.1 shows the configuration of the initial reset circuit.
RESET
K00
K01
K02
K03
OSC2
OSC1
oscilation
circuit
Noise
reject
circuit
Latch
Internal
initial reset
"L" when SLEEP function is selected
VDD
Oscillation
detection
circuit
VDD
VSS
Mask option
Fig. 2.2.1 Configuration of initial reset circuit
2.2.1 Simultaneous low input to input ports (K00–K03)
An initial reset can be performed by inputting low signals simultaneously to the input ports (K00–K03)
selected with the mask option. The specified input port terminals must be kept low for at least a time
shown in Table 2.2.1.1, because the signals pass through the noise rejection circuit. Table 2.2.1.2 shows the
combinations of the input ports (K00–K03) that can be selected with the mask option.
相關(guān)PDF資料
PDF描述
S1C6P366D0A0100 4-BIT, FLASH, 4.1 MHz, MICROCONTROLLER, UUC102
S1C6P466D0A0A00 MICROCONTROLLER, UUC140
S1C6S2L7D 4-BIT, MROM, 0.032 MHz, MICROCONTROLLER, UUC58
S1C6S2A7F 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, PQFP60
S1C6S2B7F 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, PQFP60
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S1C-6-S 制造商:GRIPCO 功能描述:
S1C7309X 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:B/W CCD PROCESSOR
S1C7309X01 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:B/W CCD PROCESSOR
S1C88349 制造商:EPSON 制造商全稱:EPSON 功能描述:8-bit Single Chip Microcomputer
S1C88649 制造商:EPSON 制造商全稱:EPSON 功能描述:8-bit Single Chip Microcomputer
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*