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參數(shù)資料
| 型號： | S1C6N3B0D0A0100 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, UUC54 |
| 封裝： | DIE-54 |
| 文件頁數(shù)： | 59/79頁 |
| 文件大?。?/td> | 606K |
| 代理商： | S1C6N3B0D0A0100 |
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54
EPSON
S1C6N3B0 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIARCUITS AND OPERATION (Interrupt and HALT/SLEEP)
4.11 Interrupt and HALT/SLEEP
The S1C6N3B0 Series provides the following interrupt settings, each of which is maskable.
External interrupt:
Input port interrupt (one)
I/O port interrupt (one) - available when "input-only" is selected by mask option
Internal interrupt:
Timer interrupt (three)
Stopwatch interrupt (two)
Serial interface interrupt (one)
To enable interrupts, the interrupt flag must be set to "1" (EI) and the necessary related interrupt mask
registers must be set to "1" (enable). When an interrupt occurs, the interrupt flag is automatically reset to
"0" (DI) and interrupts after that are inhibited.
Figure 4.11.1 shows the configuration of the interrupt circuit.
K00
EIK00
K01
EIK01
K02
EIK02
K03
EIK03
ISW0
EISW0
ISW1
EISW1
IT2
EIT2
IT8
EIT8
IT32
EIT32
IK0
(MSB)
:
(LSB)
Program counter
(low-order 4 bits)
Interrupt vector
SLEEP
cancelation
Interrupt factor flag
Interrupt mask register
Interrupt
flag
INT
(Interrupt request)
ISIO
EISIO
(Mask option)
P01 or P03
EIP0
IP0
Fig. 4.11.1 Configuration of interrupt circuit
HALT mode
When the HALT instruction is executed, the CPU stops operating and enters the HALT mode. The
oscillation circuit and the peripheral circuits operate in the HALT mode. By an interrupt, the CPU exits
the HALT mode and resumes operating.
SLEEP mode (S1C6N3B0 CR oscillator model, S1C6A3B0)
The SLEEP function can be selected in the S1C6N3B0 CR oscillator model and the S1C6A3B0 by mask
option. When the SLEEP function has been selected, executing the SLP instruction sets the IC in the
SLEEP mode and stops operation of the CPU, oscillation circuit and LCD power supply circuit. The
SLEEP mode will be canceled by an input interrupt request from the input port or the I/O port selected
by mask option.
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