參數(shù)資料
型號(hào)： S1C621C0D
元件分類(lèi)： 微控制器/微處理器
英文描述： 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC74
封裝： DIE-74
文件頁(yè)數(shù)： 89/108頁(yè)
文件大?。?/td> 992K
代理商： S1C621C0D
S1C621C0 TECHNICAL MANUAL
EPSON
73
CHAPTER 5: SUMMARY OF NOTES
5.2 Summary of Notes by Function
Here, the cautionary notes are summed up by function category. Keep these notes well in mind when
programming.
Memory
Memory is not mounted in unused area within the memory map and in memory area not indicated in this
manual. For this reason, normal operation cannot be assured for programs that have been prepared with
access to these areas.
Watchdog timer
When the watchdog timer is being used, the software must reset it within 3-second cycles.
Oscillation circuit
(1) It takes at least 5 msec from the time the OSC3 oscillation circuit goes ON until the oscillation stabilizes.
Consequently, when switching the CPU operation clock from OSC1 to OSC3, do this after a minimum
of 5 msec have elapsed since the OSC3 oscillation went ON.
Further, the oscillation stabilization time varies depending on the external oscillator characteristics and
conditions of use, so allow ample margin when setting the wait time.
OSC1
→ OSC3
1. Set OSCC to "1" (OSC3 oscillation ON)
2. Maintain 5 msec or more
3. Set CLKCHG to "1" (OSC1
→ OSC3)
OSC3
→ OSC1
1. Set CLKCHG to "0" (OSC3
→ OSC1)
2. Set OSCC to "0" (OSC3 oscillation OFF)
(2) When switching the clock form OSC3 to OSC1, use a separate instruction for turning the OSC3 oscilla-
tion OFF. An error in the CPU operation can result if this processing is performed at the same time by
the one instruction.
(3) If it is not necessary to operate the CPU in high-speed and the OSC3 clock is not needed for some
peripheral circuits, turn the OSC3 oscillation circuit off (CLKCHG = "0", OSCC = "0") to reduce current
consumption.
Input ports
(1) When input ports are changed from low to high by pull up resistor, the rise of the waveform is delayed
on account of the time constant of the pull up resistor and input gate capacitance. Hence, when fetching
input ports, set an appropriate wait time.
Particular care needs to be taken of the key scan during key matrix configuration.
Make this waiting time the amount of time or more calculated by the following expression.
Waiting time = RIN
× (CIN + load capacitance on board) × 1.6 [sec]
RIN: pull up resistance (Max. value)
CIN: terminal capacitance (Max. value)
(2) When the input comparison register (KCP00–KCP03, KCP10–KCP13) is set, the interrupt factor flag
(IK0, IK1) may be set to "1" depending on the status of the input port terminal. Consequently, when
setting this register, do it in the DI status (interrupt flag = "0") and then read the interrupt factor flag in
order to reset, or after setting the interrupt selection register (SIK00–SIK03, SIK10–SIK13) to the inter-
rupt disabled status.
Output ports
(1) When R00–R03 are used as DC output, the special output enable registers REMCR (R00), REMDC (R01),
FOUTE (R02) and BZE (R03) should be fixed at "0".
(2) When the special output is selected, the corresponding output port register (R00–R03) should be fixed
at "0". Be aware that the output terminal is fixed at a high (VDD) level the same with the DC output if "1"
is written to the R00–R03 register when the special output has been selected.
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