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參數(shù)資料
| 型號： | S1C621C0D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC74 |
| 封裝： | DIE-74 |
| 文件頁數(shù)： | 30/108頁 |
| 文件大?。?/td> | 992K |
| 代理商： | S1C621C0D |
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20
EPSON
S1C621C0 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
K00–K03, K10–K13: Input port data (91H, 95H)
Input data of the input port terminals can be read with these registers.
When "1" is read:
High level
When "0" is read:
Low level
Writing:
Invalid
The reading is "1" when the terminal voltage of the 8 bits of the input ports (K00–K03, K10–K13) goes high
(VDD), and "0" when the voltage goes low (VSS).
These bits are dedicated for reading, so writing cannot be done.
KCP00–KCP03, KCP10–KCP13: Input comparison registers (92H, 96H)
Interrupt conditions for terminals K00–K03 and K10–K13 can be set with these registers.
When "1" is written:
Falling edge
When "0" is written:
Rising edge
Reading:
Valid
The interrupt conditions can be set for the rising or falling edge of input for each of the eight bits (K00–K03
and K10–K13), through the input comparison registers (KCP00–KCP03 and KCP10–KCP13).
For KCP00–KCP03, a comparison is done only with the ports that are enabled by the interrupt among K00–
K03 by means of the SIK00–SIK03 registers. For KCP10–KCP13, a comparison is done only with the ports
that are enabled by the interrupt among K10–K13 by means of the SIK10–SIK13 registers.
At initial reset, these registers are set to "1".
SIK00–SIK03, SIK10–SIK13: Interrupt selection registers (90H, 94H)
Selects the port to be used for the K00–K03 and K10–K13 input interrupt.
When "1" is written:
Enable
When "0" is written:
Disable
Reading:
Valid
Enables the interrupt for the input ports (K00–K03, K10–K13) for which "1" has been written into the
interrupt selection register (SIK00–SIK03, SIK10–SIK13). The input port set for "0" does not affect the
interrupt generation condition.
At initial reset, these registers are set to "0".
EIK0, EIK1: Interrupt mask registers (F3HD0, F2HD0)
Masking the interrupt of the input port can be selected with these registers.
When "1" is written:
Enable
When "0" is written:
Mask
Reading:
Valid
With these registers, masking of the input port can be selected for each of the two systems (K00–K03, K10–K13).
At initial reset, these registers are all set to "0".
IK0, IK1: Interrupt factor flags (FBHD0, FAHD0)
These flags indicate the occurrence of input interrupt.
When "1" is read:
Interrupt has occurred
When "0" is read:
Interrupt has not occurred
Writing:
Invalid
The interrupt factor flags IK0 and IK1 are associated with K00–K03 and K10–K13, respectively. From the
status of these flags, the software can decide whether an input interrupt has occurred.
These flags are set to "1" by generating the corresponding interrupt factor regardless of the interrupt mask
register (EIK0, EIK1) settings.
Reading of interrupt factor flags is available at EI, but be careful in the following cases.
If the interrupt mask register value corresponding to the interrupt factor flags to be read is set to "1", an
interrupt request will be generated by the interrupt factor flags set timing, or an interrupt request will not
be generated.
These flags are reset when the software reads them.
At initial reset, these flags are set to "0".
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