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參數(shù)資料
| 型號： | S1C621C0D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC74 |
| 封裝： | DIE-74 |
| 文件頁數(shù)： | 35/108頁 |
| 文件大?。?/td> | 992K |
| 代理商： | S1C621C0D |
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24
EPSON
S1C621C0 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Output Ports)
BZ (R03)
BZ is the buzzer signal output for driving the piezo-electric buzzer, and it can be output from the R03
terminal.
When R03 is used for BZ output, keep R03 register set to "0". ON/OFF of the signal output can be control-
led by the BZE register.
When the BZE register is set to "1", BZ signal is output from the R03 terminal. When "0" is set, the R03
terminal goes low level (VSS).
The buzzer frequency can be selected as 2,048 Hz or 4,096 Hz by setting of the BZFQ register. When the
BZFQ register is set to "0", the frequency is set to 2,048 Hz, and to 4,096 Hz when "1" is set.
Note: A hazard may occur when the BZ signal is turned ON or OFF.
Figure 4.5.3.3 shows the output waveform of BZ.
Fig. 4.5.3.3 Output waveform of BZ
4.5.4 Control of output ports
Table 4.5.4.1 lists the output ports' control bits and their addresses.
Table 4.5.4.1 Control bits of output ports
BZE register
BZ output (R03)
01
R03 register
Fixed at 0
0
Address
Comment
Register
D3
D2
D1
D0
Name
Init
1
0
*1
R00
(REMCR)
BZFQ
R/W
FOFQ0
REMCR
R03
R02
R01
R00
BZE
0
BZFQ
FOUTE
0
FOFQ1
FOFQ0
0
REMSO
REMDC
REMCR
0
–
0
–
0
–
0
High
Enable
4,096Hz
Enable
On
Low
Disable
2,048Hz
Disable
Off
R01
(REMDC)
0
FOFQ1
REMDC
R/W
R02
(FOUT)
0
R
REMSO
R03
(BZ)
BZE
R/W
FOUTE
R/W
0
R
A0H
C4H
C5H
E0H
*2
*5
*7
Output port R03
Output port R02
Output port R01
Output port R00
Buzzer output enable
Unused
Buzzer frequency selection
FOUT output enable
Unused
FOUT frequency selection
0: 512 Hz, 1: 4,096 Hz, 2: fOSC1, 3: fOSC3
Unused
REM soft-timer output control
REM DC output control
REM carrier output control
R/W
R
Fix at "0" during BZ,
FOUT, REMDC
and REMCR output
*1 Initial value at the time of initial reset
*5 Constantly "0" when being read
*2 Not set in the circuit
*6 Refer to main manual
*3 Undefined
*7 Page switching in I/O memory is not necessary
*4 Reset (0) immediately after being read
R00–R03: Output port data (A0H)
Sets the output data for the output ports.
When "1" is written:
High output
When "0" is written:
Low output
Reading:
Valid
The output port terminals output the data written in the corresponding registers (R00–R03) without
changing it. When "1" is written in the register, the output port terminal goes high (VDD), and when "0" is
written, the output port terminal goes low (VSS).
The registers R00–R03 that are used as special output should be fixed at "0".
At initial reset, these registers are set to "0".
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