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參數(shù)資料
| 型號(hào)： | S1C621C0D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC74 |
| 封裝： | DIE-74 |
| 文件頁數(shù)： | 29/108頁 |
| 文件大?。?/td> | 992K |
| 代理商： | S1C621C0D |
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S1C621C0 TECHNICAL MANUAL
EPSON
19
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
K00 interrupt is disabled by the interrupt selection register (SIK00), so that an interrupt does not occur at
(2). At (3), K03 changes to "0"; the data of the terminal that is interrupt enabled no longer matches the data
of the input comparison register, so that interrupt occurs. As already explained, the condition for the
interrupt to occur is the change in the port data and contents of the input comparison register from match-
ing to no matching. Hence, in (4), when the no matching status changes to another no matching status, an
interrupt does not occur. Further, terminals that have been masked for interrupt do not affect the condi-
tions for interrupt generation.
4.4.4 Control of input ports
Table 4.4.4.1 lists the input ports control bits and their addresses.
Table 4.4.4.1 Input port control bits
Address
Comment
Register
D3
D2
D1
D0
Name
Init
1
0
*1
SIK00
K00
KCP00
SIK10
K10
KCP1
EIK1
R/W
EIK0
R/W
IK1
IK0
SIK03
SIK02
SIK01
SIK00
K03
K02
K01
K00
KCP03
KCP02
KCP01
KCP00
SIK13
SIK12
SIK11
SIK10
K13
K12
K11
K10
KCP13
KCP12
KCP11
KCP10
0
EIK1
0
EIK0
0
IK1
0
IK0
0
–
1
0
–
1
–
0
–
0
–
0
–
0
Enable
High
Enable
High
Enable
Yes
Disable
Low
Disable
Low
Mask
No
SIK01
K01
KCP01
SIK11
K11
KCP11
0
SIK02
K02
KCP02
SIK12
K12
KCP12
0
R
0
R
0
SIK03
K03
KCP03
SIK13
K13
KCP13
0
90H
91H
92H
94H
95H
96H
F2H
F3H
FAH
FBH
*2
*5
*4
*5
*4
*7
Interrupt selection register (K00–K03)
Input port K00–K03
Input comparison register (K00–K03)
Interrupt selection register (K10–K13)
Input port K10–K13
Input comparison register (K10–K13)
Unused
Interrupt mask register (K10–K13)
Unused
Interrupt mask register (K00–K03)
Unused
Interrupt factor flag (K10–K13)
Unused
Interrupt factor flag (K00–K03)
R/W
R
R/W
R
R/W
R
*1 Initial value at the time of initial reset
*5 Constantly "0" when being read
*2 Not set in the circuit
*6 Refer to main manual
*3 Undefined
*7 Page switching in I/O memory is not necessary
*4 Reset (0) immediately after being read
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