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參數(shù)資料
| 型號： | S1C621C0D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC74 |
| 封裝： | DIE-74 |
| 文件頁數(shù)： | 57/108頁 |
| 文件大?。?/td> | 992K |
| 代理商： | S1C621C0D |
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44
EPSON
S1C621C0 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Remote Controller)
4.9.4 Soft-timer mode
In the soft-timer mode, software controls the ON/OFF time and timing of the carrier output. This mode
does not use the
τ (reference cycle) generation circuit, pulse modulation circuit and interrupt control circuit
that are used in the hard-timer mode, and operates with the configuration as shown in Figure 4.9.4.1.
OSC3
oscillation
circuit
fOSC3
RCDIV RCDTY
REMSO
REMCR REMDC
REMCR
REMDC
Carrier
generation
circuit
ON/OFF
signal
Fig. 4.9.4.1 REM circuit configuration in soft-timer mode
The ON/OFF control of the carrier output is done using the REMSO register (E0HD2). By writing "1" to
the REMSO register, the carrier is output to the REMCR terminal and when "0" is written, the REMCR
terminal goes low level (VSS). However, the carrier must be generated by writing "1" to the REMCR register
before writing "1" to the REMSO register.
Moreover, when the REMDC register has been set to "1" (the R01 register is fixed at "0"), the content of the
REMSO register is output from the REMDC terminal as the REMDC signal.
Figure 4.9.4.2 shows the timing chart in the soft-timer mode.
REMCR register
REMDC register
Carrier
REMSO register
REMDC (R01) output
REMCR (R00) output
Fig. 4.9.4.2 Timing chart (soft-timer mode)
Note: Writing to the REMSO register without synchronization with the carrier generation circuit, therefore
when turning the carrier output ON/OFF using the REMSO register, the duty ratio of the carrier will
not be the value set by the software. (Figure 4.9.4.3)
Fig. 4.9.4.3 Carrier ON/OFF by REMSO register
Be sure to control the carrier output using the REMSO register. Do not control the carrier output
using the REMCR register by setting the REMSO register to "1". Similarly, in the case of REMDC
output, do not control the output using the REMDC register.
4.9.5 Hard-timer mode and REM interrupt
In the soft-timer mode, the CPU is occupied for the remote output processing so that it has no flexibility for
execution of other routines. To alleviate this problem, the S1C621C0 supports the hard-timer mode ex-
plained below.
In the hard-timer mode, the carrier ON/OFF, that is controlled using the REMSO register in the soft-timer
mode, is done in the hardware by using the
τ (reference cycle) generation circuit and the pulse modulation
circuit.
τ (reference cycle) is generated from the carrier by dividing, and is used for reference of the carrier
ON/OFF time in the hard-timer mode. The dividing ratio of
τ (reference cycle) is selected from 4 types by
the software. The carrier ON/OFF time can be set for each transmission data bit by the software using
τ
(reference cycle) as reference. Furthermore, the interrupt function is provided so that the setting can be
done without synchronizing with the timing of the carrier output.
The interrupt timing can also be set by the software using
τ (reference cycle) as the reference same as the
ON/OFF time.
REMSO register
REMCR (R00) output
Carrier duty ratio will be different from the value set by the software
at the time the signal turns ON/OFF using the REMSO register.
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