參數(shù)資料
型號(hào): PI7C7300ANAE
廠商: Pericom
文件頁(yè)數(shù): 91/109頁(yè)
文件大小: 0K
描述: IC PCI-PCI BRIDGE 3PORT 272-BGA
產(chǎn)品變化通告: Product Discontinuation 09/Dec/2010
標(biāo)準(zhǔn)包裝: 40
系列: *
應(yīng)用: *
接口: *
電源電壓: *
封裝/外殼: 272-BBGA
供應(yīng)商設(shè)備封裝: 272-PBGA(27x27)
包裝: 管件
安裝類型: 表面貼裝
PI7C7300A
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 82 OF 109
09/25/03 Revision 1.09
Bit
Function
Type
Description
4
Memory Read
Flow-Through
Control
R/W
Controls whether the bridge supports memory read flow-through
0: Enable
1: Disable
Reset to 0
8:5
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0
10:9
Test Mode For
All Counters at P
and S1
R/O
Controls the testability of the bridge’s internal counters.
The bits are used for chip test only.
00: all bits are exercised
01: byte 1 is exercised
10: byte 2 is exercised
11: byte 3 is exercised
Reset to 0
15:11
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0.
Configuration 2
Bit
Function
Type
Description
0
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0
1
Memory Write
Disconnect
Control at S2
R/W
Controls when the bridge (as a target) disconnects memory write
transactions.
0: memory write disconnects at 4KB aligned address boundary
1: memory write disconnects at cache line aligned address boundary
Reset to 0
3:2
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0
4
Memory Read
Flow-through
Control
R/W
Controls whether the bridge supports memory read flow-through
0: Enable
1: Disable
Reset to 0
8:5
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0
10:9
Test Mode For
All Counters at
S2
R/O
Controls the testability of the bridge’s internal counters.
The bits are used for chip test only.
00: all bits are exercised
01: byte 1 is exercised
10: byte 2 is exercised
11: byte 3 is exercised
Reset to 0
15:11
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0.
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