參數(shù)資料
型號(hào)： PI7C7300ANAE
廠商： Pericom
文件頁數(shù)： 55/109頁
文件大?。?/td> 0K
描述： IC PCI-PCI BRIDGE 3PORT 272-BGA
產(chǎn)品變化通告： Product Discontinuation 09/Dec/2010
標(biāo)準(zhǔn)包裝： 40
系列： *
應(yīng)用： *
接口： *
電源電壓： *
封裝/外殼： 272-BBGA
供應(yīng)商設(shè)備封裝： 272-PBGA（27x27）
包裝： 管件
安裝類型： 表面貼裝
PI7C7300A
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 5 OF 109
09/25/03 Revision 1.09
TABLE OF CONTENTS
1
INTRODUCTION .............................................................................................................................. 11
2
BLOCK DIAGRAM........................................................................................................................... 12
3
SIGNAL DEFINITIONS ................................................................................................................... 13
3.1
SIGNAL TYPES .......................................................................................................................... 13
3.2
PRIMARY BUS INTERFACE SIGNALS ................................................................................... 13
3.3
SECONDARY BUS INTERFACE SIGNALS............................................................................. 15
3.4
CLOCK SIGNALS....................................................................................................................... 17
3.5
MISCELLANEOUS SIGNALS ................................................................................................... 17
3.6
COMPACT PCI HOT-SWAP SIGNALS..................................................................................... 17
3.7
JTAG BOUNDARY SCAN SIGNALS........................................................................................ 18
3.8
POWER AND GROUND............................................................................................................. 18
3.9
PI7C7300A PBGA PIN LIST ....................................................................................................... 18
4
PCI BUS OPERATION ..................................................................................................................... 21
4.1
TYPES OF TRANSACTIONS..................................................................................................... 21
4.2
SINGLE ADDRESS PHASE ....................................................................................................... 22
4.3
DUAL ADDRESS PHASE........................................................................................................... 22
4.4
DEVICE SELECT (DEVSEL#) GENERATION......................................................................... 22
4.5
DATA PHASE ............................................................................................................................. 22
4.6
WRITE TRANSACTIONS .......................................................................................................... 23
4.6.1
MEMORY WRITE TRANSACTIONS.................................................................................... 23
4.6.2
MEMORY WRITE AND INVALIDATE TRANSACTIONS.................................................... 24
4.6.3
DELAYED WRITE TRANSACTIONS ................................................................................... 24
4.6.4
WRITE TRANSACTION ADDRESS BOUNDARIES ............................................................ 25
4.6.5
BUFFERING MULTIPLE WRITE TRANSACTIONS........................................................... 26
4.6.6
FAST BACK-TO-BACK WRITE TRANSACTIONS .............................................................. 26
4.7
READ TRANSACTIONS ............................................................................................................ 26
4.7.1
PREFETCHABLE READ TRANSACTIONS......................................................................... 26
4.7.2
NON-PREFETCHABLE READ TRANSACTIONS ............................................................... 27
4.7.3
READ PREFETCH ADDRESS BOUNDARIES.................................................................... 27
4.7.4
DELAYED READ REQUESTS ............................................................................................. 28
4.7.5
DELAYED READ COMPLETION WITH TARGET ............................................................. 28
4.7.6
DELAYED READ COMPLETION ON INITIATOR BUS..................................................... 29
4.7.7
FAST BACK-TO-BACK READ TRANSACTION.................................................................. 30
4.8
CONFIGURATION TRANSACTIONS ...................................................................................... 30
4.8.1
TYPE 0 ACCESS TO PI7C7300A......................................................................................... 30
4.8.2
TYPE 1 TO TYPE 0 CONVERSION ..................................................................................... 31
4.8.3
TYPE 1 TO TYPE 1 FORWARDING.................................................................................... 32
4.8.4
SPECIAL CYCLES ............................................................................................................... 33
4.9
TRANSACTION TERMINATION ............................................................................................. 34
4.9.1
MASTER TERMINATION INITIATED BY PI7C7300A ....................................................... 35
4.9.2
MASTER ABORT RECEIVED BY PI7C7300A .................................................................... 35
4.9.3
TARGET TERMINATION RECEIVED BY PI7C7300A ....................................................... 36
4.9.3.1
DELAYED WRITE TARGET TERMINATION RESPONSE........................................................ 36
4.9.3.2
POSTED WRITE TARGET TERMINATION RESPONSE ........................................................... 37
4.9.3.3
DELAYED READ TARGET TERMINATION RESPONSE ......................................................... 38
4.9.4
TARGET TERMINATION INITIATED BY PI7C7300A ....................................................... 38
4.9.4.1
TARGET RETRY............................................................................................................................ 38
4.9.4.2
TARGET DISCONNECT................................................................................................................ 39
4.9.4.3
TARGET ABORT ........................................................................................................................... 40
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C7300ANA-E 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA
PI7C7300DNAE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI PCI -to -PCI Bridge 3 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C7300EVB 功能描述:界面開發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
PI7C8140A 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON
PI7C8140AEVB 功能描述:界面開發(fā)工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
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