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參數(shù)資料
| 型號： | PI7C7300ANAE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 31/109頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PCI-PCI BRIDGE 3PORT 272-BGA |
| 產(chǎn)品變化通告： | Product Discontinuation 09/Dec/2010 |
| 標準包裝： | 40 |
| 系列： | * |
| 應用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 272-BBGA |
| 供應商設備封裝： | 272-PBGA（27x27） |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
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PI7C7300A
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 28 OF 109
09/25/03 Revision 1.09
Memory Read
Prefetchable
CLS = 0 or 16
16-DWORD aligned address
boundary
Memory Read
Prefetchable
CLS = 1, 2, 4, 8, 16
Cache line address boundary
Memory Read Line
-
CLS = 0 or 16
16-DWORD aligned address
boundary
Memory Read Line
-
CLS = 1, 2, 4, 8, 16
Cache line boundary
Memory Read Multiple
-
CLS = 0 or 16
32-DWORD aligned address
boundary
Memory Read Multiple
-
CLS = 1, 2, 4, 8, 16
2X of cache line boundary
- does not matter if it is prefetchable or non-prefetchable
* don’t care
Table 4-5 READ TRANSACTION PREFETCHING
Type of Transaction
Read Behavior
I/O Read
Prefetching never allowed
Configuration Read
Prefetching never allowed
Downstream: Prefetching used if address is prefetchable space
Memory Read
Upstream: Prefetching used or programmable
Memory Read Line
Prefetching always used
Memory Read Multiple
Prefetching always used
See Section 5.3 for detailed information about prefetchable and non-prefetchable address spaces.
4.7.4
DELAYED READ REQUESTS
PI7C7300A treats all read transactions as delayed read transactions, which means that the
read request from the initiator is posted into a delayed transaction queue. Read data from
the target is placed in the read data queue directed toward the initiator bus interface and
is transferred to the initiator when the initiator repeats the read transaction.
When PI7C7300A accepts a delayed read request, it first samples the read address, read
bus command, and address parity. When IRDY# is asserted, PI7C7300A then samples
the byte enable bits for the first data phase. This information is entered into the delayed
transaction queue. PI7C7300A terminates the transaction by signaling a target retry to the
initiator. Upon reception of the target retry, the initiator is required to continue to repeat
the same read transaction until at least one data transfer is completed, or until a target
response (target abort or master abort) other than a target retry is received.
4.7.5
DELAYED READ COMPLETION WITH TARGET
When delayed read request reaches the head of the delayed transaction queue,
PI7C7300A arbitrates for the target bus and initiates the read transaction only if all
previously queued posted write transactions have been delivered. PI7C7300A uses the
exact read address and read command captured from the initiator during the initial
delayed read request to initiate the read transaction. If the read transaction is a non-
prefetchable read, PI7C7300A drives the captured byte enable bits during the next cycle.
If the transaction is a prefetchable read transaction, it drives all byte enable bits to zero
for all data phases. If PI7C7300A receives a target retry in response to the read
transaction on the target bus, it continues to repeat the read transaction until at least one
data transfer is completed, or until an error condition is encountered. If the transaction is
terminated via normal master termination or target disconnect after at least one data
transfer has been completed, PI7C7300A does not initiate any further attempts to read
more data.
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| PI7C8150ANDE | IC PCI-PCI BRIDGE 2PORT 256-PBGA |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C7300ANA-E | 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA |
| PI7C7300DNAE | 功能描述:外圍驅(qū)動器與原件 - PCI PCI -to -PCI Bridge 3 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C7300EVB | 功能描述:界面開發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| PI7C8140A | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON |
| PI7C8140AEVB | 功能描述:界面開發(fā)工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
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