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參數(shù)資料
| 型號： | PI7C7300ANAE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 41/109頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PCI-PCI BRIDGE 3PORT 272-BGA |
| 產(chǎn)品變化通告： | Product Discontinuation 09/Dec/2010 |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 系列： | * |
| 應(yīng)用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 272-BBGA |
| 供應(yīng)商設(shè)備封裝： | 272-PBGA（27x27） |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
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PI7C7300A
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 37 OF 109
09/25/03 Revision 1.09
PI7C7300A makes 224 (default) or 232 (maximum) write attempts resulting in a response
of target retry.
Table 4-7 DELAYED WRITE TARGET TERMINATION RESPONSE
Target Termination
Response
Normal
Returning disconnect to initiator with first data transfer only if multiple data
phases requested.
Target Retry
Returning target retry to initiator. Continue write attempts to target
Target Disconnect
Returning disconnect to initiator with first data transfer only if multiple data
phases requested.
Target Abort
Returning target abort to initiator. Set received target abort bit in target interface
status register. Set signaled target abort bit in initiator interface status register.
After the PI7C7300A makes 224 (default) attempts of the same delayed write trans-action
on the target bus, PI7C7300A asserts P_SERR# if the SERR# enable bit (bit 8 of
command register for secondary bus S1 or S2) is set and the delayed-write-non- delivery
bit is not set. The delayed-write-non-delivery bit is bit 5 of P_SERR# event disable
register (offset 64h). PI7C7300A will report system error. See Section 7.4 for a
description of system error conditions.
4.9.3.2
POSTED WRITE TARGET TERMINATION RESPONSE
When PI7C7300A initiates a posted write transaction, the target termination cannot be
passed back to the initiator. Table 4-8 shows the response to each type of target
termination that occurs during a posted write transaction.
Table 4-8 RESPONSE TO POSTED WRITE TARGET TERMINATION
Target Termination
Repsonse
Normal
No additional action.
Target Retry
Repeating write transaction to target.
Target Disconnect
Initiate write transaction for delivering remaining posted write data.
Target Abort
Set received-target-abort bit in the target interface status register. Assert
P_SERR# if enabled, and set the signaled-system-error bit in primary status
register.
Note that when a target retry or target disconnect is returned and posted write data
associated with that transaction remains in the write buffers, PI7C7300A initiates another
write transaction to attempt to deliver the rest of the write data. If there is a target retry,
the exact same address will be driven as for the initial write trans-action attempt. If a
target disconnect is received, the address that is driven on a subsequent write transaction
attempt will be updated to reflect the address of the current DWORD. If the initial write
transaction is Memory-Write-and-Invalidate transaction, and a partial delivery of write
data to the target is performed before a target disconnect is received, PI7C7300A will use
the memory write command to deliver the rest of the write data. It is because an
incomplete cache line will be transferred in the subsequent write transaction attempt.
After the PI7C7300A makes 224 (default) write transaction attempts and fails to deliver
all posted write data associated with that transaction, PI7C7300A asserts P_SERR# if the
primary SERR# enable bit is set (bit 8 of command register for secondary bus S1 or S2)
and posted-write-non-delivery bit is not set. The posted-write-non-delivery bit is the bit 2
of P_SERR# event disable register (offset 64h). PI7C7300A will report system error. See
Section 7.4 for a discussion of system error conditions.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C7300ANA-E | 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA |
| PI7C7300DNAE | 功能描述:外圍驅(qū)動器與原件 - PCI PCI -to -PCI Bridge 3 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C7300EVB | 功能描述:界面開發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| PI7C8140A | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON |
| PI7C8140AEVB | 功能描述:界面開發(fā)工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
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