參數(shù)資料
型號: PI7C7300ANAE
廠商: Pericom
文件頁數(shù): 4/109頁
文件大?。?/td> 0K
描述: IC PCI-PCI BRIDGE 3PORT 272-BGA
產(chǎn)品變化通告: Product Discontinuation 09/Dec/2010
標(biāo)準(zhǔn)包裝: 40
系列: *
應(yīng)用: *
接口: *
電源電壓: *
封裝/外殼: 272-BBGA
供應(yīng)商設(shè)備封裝: 272-PBGA(27x27)
包裝: 管件
安裝類型: 表面貼裝
PI7C7300A
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 101 OF 109
09/25/03 Revision 1.09
17.1
MAXIMUM RATINGS
(Above which the useful life may be impaired. For user guidelines, not tested).
Storage Temperature
-65
°C to 150°C
Ambient Temperature with Power Applied
-40
°C to 85°C
Supply Voltage to Ground Potentials (Inputs and AVCC, VDD only]
-0.3V to 3.6V
DC Input Voltage
-0.5V to 3.6V
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at
these or any conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for
extended periods of time may affect reliability.
17.2
3.3V DC SPECIFICATIONS
Symbol
Parameter
Condition
Min.
Max.
Units
Notes
VDD,
AVCC
Supply Voltage
3
3.6
V
Vih
Input HIGH Voltage
0.5 VDD
VDD + 0.5
V
3
Vil
Input LOW Voltage
-0.5
0.3 VDD
V
3
Vih
CMOS Input HIGH Voltage
0.7 VDD
VDD + 0.5
V
1
Vil
CMOS Input LOW Voltage
-0.5
0.3 VDD
V
1
Vipu
Input Pull-up Voltage
0.7 VDD
V
3
Iil
Input Leakage Current
0 < Vin < VDD
±10
A
3
Voh
Output HIGH Voltage
Iout = -500A
0.9VDD
V
3
Vol
Output LOW Voltage
Iout = 1500A
0.1 VDD
V
3
Voh
CMOS Output HIGH Voltage
Iout = -500A
VDD – 0.5
V
2
Vol
CMOS Output LOW Voltage
Iout = 1500A
0.5
V
2
Cin
Input Pin Capacitance
10
pF
3
CCLK
CLK Pin Capacitance
5
12
pF
3
CIDSEL
IDSEL Pin Capacitance
8
pF
3
Lpin
Pin Inductance
20
nH
3
Notes:
1.
CMOS Input pins: S_CFN#, TCK, TMS, TDI, TRST#, SCAN_EN, SCAN_TM#
2.
CMOS Output pin: TDO
3. PCI pins: P_AD[31:0], P_CBE[3:0], P_PAR, P_FRAME#, P_IRDY#, P_TRDY#,
P_DEVSEL#, P_STOP#, P_LOCK#, PIDSEL#, P_PERR#, P_SERR#, P_REQ#, P_GNT#,
P_RESET#, S1_AD[31:0], S2_AD[31:0], S1_CBE[3:0], S2_CBE[3:0], S1_PAR, S2_PAR,
S1_FRAME#, S2_FRAME#, S1_IRDY#, S2_IRDY#, S1_TRDY#, S2_TRDY#,
S1_DEVSEL#, S2_DEVSEL#, S1_STOP#, S2_STOP#, S1_LOCK#, S2_LOCK#,
S1_PERR#, S2_PERR#, S1_SERR#, S2_SERR#, S1_REQ[7:0]#, S2_REQ[6:0]#,
S1_GNT[7:0]#, S2_GNT[6:0], S1_RESET#, S2_RESET#, S1_EN, S2_EN, HSLED,
HS_SW#, HS_EN, ENUM#.
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