參數(shù)資料
型號： ORT82G5
英文描述： ORCA ORT82G5 1.0.1-25/2.0-2.5/3.125 Gbits/s Backplane Interface FPSC
中文描述： ORCA的ORT82G5 1.0.1-25/2.0-2.5/3.125 Gb /秒背板接口促進文化基金
文件頁數(shù)： 60/92頁
文件大?。?/td> 1823K
代理商： ORT82G5
60
Agere Systems Inc.
Preliminary Data Sheet
July 2001
1.0-1.25/2.0-2.5/3.125 Gbits/s Backplane Interface
ORCA
ORT82G5 FPSC Eight-Channel
Pin Information
(continued)
This section describes device I/O signals to/from the embedded core excluding the signals at the CIC boundary.
Table 24. FPSC Function Pin Description
Symbol
I/O
Description
Common Signals for Both SERDES A and B
PASB_RESETN
PASB_TRISTN
PASB_PDN
PASB_TESTCLK
PBIST_TEST_ENN
PLOOP_TEST_ENN
PMP_TESTCLK
PMP_TESTCLK_ENN
PSYS_DOBISTN
PSYS_RSSIG_ALL
SERDES A and B Pins
REFCLKN_A
REFCLKP_A
REFCLKN_B
REFCLKP_B
REXT_A
REXT_B
REXTN_A
I
I
I
I
I
I
I
I
I
Reset.
3-state output buffers.
Power down.
Clock input for BIST and loopback test.
Selection of PASB_TESTCLK input for BIST test.
Selection of PASB_TESTCLK input for loopback test.
Clock input for microprocessor in test mode.
Selection of PMP_TESTCLK in test mode.
Input to start BIST test.
Output result of BIST test.
O
I
I
I
I
I
I
I
CML reference clock input
—
SERDES A.
CML reference clock input
—
SERDES A.
CML reference clock input
—
SERDES B.
CML reference clock input
—
SERDES B.
Reference resistor - SERDES A.
Reference resistor - SERDES B.
Reference resistor - SERDES A. A 3.32 K
± 1% resistor must be con-
nected across REXT_A and REXTN_A.
Reference resistor
—
SERDES B. A 3.32 K
± 1% resistor must be con-
nected across REXT_B and REXTN_B.
High-speed CML receive data input
—
SERDES A, channel A.
High-speed CML receive data input
—
SERDES A, channel A.
High-speed CML receive data input
—
SERDES A, channel B.
High-speed CML receive data input
—
SERDES A, channel B.
High-speed CML receive data input
—
SERDES A, channel C.
High-speed CML receive data input
—
SERDES A, channel C.
High-speed CML receive data input
—
SERDES A, channel D.
High-speed CML receive data input
—
SERDES A, channel D.
High-speed CML receive data input
—
SERDES B, channel A.
High-speed CML receive data input
—
SERDES B, channel A.
High-speed CML receive data input
—
SERDES B, channel B.
High-speed CML receive data input
—
SERDES B, channel B.
High-speed CML receive data input
—
SERDES B, channel C.
High-speed CML receive data input
—
SERDES B, channel C.
High-speed CML receive data input
—
SERDES B, channel D.
High-speed CML receive data input
—
SERDES B, channel D.
REXTN_B
I
HDINN_AA
HDINP_AA
HDINN_AB
HDINP_AB
HDINN_AC
HDINP_AC
HDINN_AD
HDINP_AD
HDINN_BA
HDINP_BA
HDINN_BB
HDINP_BB
HDINN_BC
HDINP_BC
HDINN_BD
HDINP_BD
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
相關PDF資料
PDF描述
ORT8850 Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
ORT8850H Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
ORT8850L Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
OS1001 Interface IC
OS1010 Optoelectronic
相關代理商/技術參數(shù)
參數(shù)描述
ORT82G5-1BM680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-1BM680I 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-1F680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 3.7GBITS/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-1F680I 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 2.7Gbits/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-1FN680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 1.5V 3.7 G b Bpln Xcvr 643K Gt RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*