參數(shù)資料
型號(hào)： ORT82G5
英文描述： ORCA ORT82G5 1.0.1-25/2.0-2.5/3.125 Gbits/s Backplane Interface FPSC
中文描述： ORCA的ORT82G5 1.0.1-25/2.0-2.5/3.125 Gb /秒背板接口促進(jìn)文化基金
文件頁(yè)數(shù)： 27/92頁(yè)
文件大小： 1823K
代理商： ORT82G5
Agere Systems Inc.
27
Preliminary Data Sheet
July 2001
1.0-1.25/2.0-2.5/3.125 Gbits/s Backplane Interface
ORCA
ORT82G5 FPSC Eight-Channel
Backplane Transceiver Core Detailed
Description
(continued)
5-8577 (F)
Figure 10. Interconnect of Streams for FIFO
Alignment
Multichannel Alignment (Backplane
FPGA)
→
The alignment FIFO allows the transfer of all data to
the system clock. The FIFO sync block (Figure 10)
allows the system to be configured to allow the frame
alignment of multiple slightly varying data streams. This
optional alignment ensures that matching SERDES
streams will arrive at the FPGA end in perfect data
sync.
The ORT82G5 has a total of 8 channels (4 per SER-
DES). The incoming data of these channels can be
synchronized in several ways, or they can be indepen-
dent of one other. For example, all four channels in a
SERDES can be aligned together to form a communi-
cation channel with a bandwidth of 10 Gbits/s as shown
in Figure 11.
Optionally, the alignment can be extended across SER-
DES to align all 8 channels in ORT82G5 as shown in
Figure 12. Individual channels within an alignment
group can be disabled (i.e., power down) without dis-
rupting other channels.
Alternatively, two channels within a SERDES can be
aligned together; channel A and B and/or channel C
and D can form a pair as shown in Figure 13.
0673(F)
Figure 11. Example of SERDES A Alignment and
SERDES B Alignment
0674
Figure 12. Example of SERDES A and B Alignment
0675
Figure 13. Example of Multiple Twin Channel
Alignment
SERDES A
STREAM A
SERDES A
STREAM B
SERDES A
STREAM C
SERDES A
STREAM D
SERDES B
STREAM A
SERDES B
STREAM B
SERDES B
STREAM C
FIFO
SYNC
SERDES B
STREAM D
SERDES A
SERDES B
SERDES A Stream A
ALL 4 ALIGNMENT OF SERDES A AND SERDES B
t
0
t
1
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
SERDES A Stream A
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
ALL 8 ALIGNMENT OF SERDES A AND SERDES B
t
0
SERDES A Stream A
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
SERDES A Stream A
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
TWO CHANNEL ALIGNMENT
t
1
t
2
SERDES A Stream A
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
t
0
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
SERDES A Stream A
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
TWIN ALIGNMENT OF STREAM A & B OF SERDES A
TWIN ALIGNMENT OF STREAM C & D OF SERDES A
TWIN ALIGNMENT OF STREAM C & D OF SERDES B
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參數(shù)描述
ORT82G5-1BM680C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-1BM680I 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-1F680C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 ORCA FPSC 3.7GBITS/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-1F680I 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 ORCA FPSC 2.7Gbits/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-1FN680C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 ORCA FPSC 1.5V 3.7 G b Bpln Xcvr 643K Gt RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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