- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄223868 > H5MS5162DFR-K3M (HYNIX SEMICONDUCTOR INC) 32M X 16 DDR DRAM, 0.5 ns, PBGA60 PDF資料下載
參數(shù)資料
| 型號： | H5MS5162DFR-K3M |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 32M X 16 DDR DRAM, 0.5 ns, PBGA60 |
| 封裝： | 8 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, FBGA-60 |
| 文件頁數(shù)： | 51/62頁 |
| 文件大小： | 1314K |
| 代理商： | H5MS5162DFR-K3M |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁當(dāng)前第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁
Rev 1.3 / Apr. 2009
55
11
Mobile DDR SDRAM 512Mbit (32M x 16bit)
H5MS5162DFR Series
POWER DOWN
Power down occurs if CKE is set low coincident with Device Deselect or NOP command and when no accesses are in
progress. If power down occurs when all banks are idle, it is Precharge Power Down.
If Power down occurs when one or more banks are Active, it is referred to as Active power down. The device cannot
stay in this mode for longer than the refresh requirements of the device, without losing data. The power down state is
exited by setting CKE high while issuing a Device Deselect or NOP command.
A valid command can be issued after tXP. For Clock stop during power down mode, please refer to the Clock Stop sub-
section in Operation section of this datasheet.
NOTE: This case shows CKE low coincident with NO OPERATION.
Alternately POWER DOWN entry can be achieved with CKE low coincident with Device DESELECT.
DEEP POWER DOWN
The Deep Power Down (DPD) mode enables very low standby currents. All internal voltage generators inside the
Mobile DDR SDRAM are stopped and all memory data is lost in this mode.
All the information in the Mode Register and the Extended Mode Register is lost. Next Figure,
DEEP POWER DOWN
COMMAND shows the DEEP POWER DOWN command All banks must be in idle state with no activity on the data bus
prior to entering the DPD mode. While in this state, CKE must be held in a constant low state.
To exit the DPD mode, CKE is taken high after the clock is stable and NOP command must be maintained for at least
200 us. After 200 us a complete re-initialization routing is required following steps 4 through 11 as defined in POWER-
UP and INITIALIZATION SEQUENCES.
Don't Care
DEEP POWER DOWN ENTRY COMMAND
POWER-DOWN ENTRY COMMAND
CS
A0~A12
WE
CAS
CLK
CKE
BA0,BA1
RAS
CS
A0~A12
WE
CAS
CLK
CKE
BA0, BA1
RAS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| H6101NL | DATACOM TRANSFORMER FOR GENERAL PURPOSE APPLICATION(S) |
| H6E1PC03130001 | 105 CONTACT(S), MULTIWAY RACK AND PANEL CONN, CRIMP, PLUG |
| H6E1PX03130001 | 105 CONTACT(S), MULTIWAY RACK AND PANEL CONN, PLUG |
| H6E2PC03130001 | MULTIWAY RACK AND PANEL CONN, CRIMP, PLUG |
| H6E2PX03130001 | MULTIWAY RACK AND PANEL CONN, PLUG |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| H5MS5162DFR-L3M | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:512Mb (32Mx16bit) Mobile DDR SDRAM |
| H5MS5162EFR | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:536,870,912-bit CMOS Low Power Double Data Rate Synchronous DRAM (Mobile DDR SDRAM) |
| H5MS5162EFR-J3M | 制造商:SK Hynix Inc 功能描述:SDRAM MOBILE DDR 512MB (X16) 60FBGA 制造商:SK Hynix Inc 功能描述:SDRAM, MOBILE DDR, 512MB (X16), 60FBGA 制造商:SK Hynix Inc 功能描述:SDRAM, MOBILE DDR, 512MB (X16), 60FBGA, Memory Type:DRAM - Synchronous, Memory C 制造商:SK Hynix Inc 功能描述:SDRAM, MOBILE DDR, 512MB (X16), 60FBGA, Memory Type:DRAM - Synchronous, Memory Configuration:32M x 16, Memory Case Style:FBGA, No. of Pins:60, IC Interface Type:LVCMOS, Operating Temperature Min:-30C, Operating Temperature Max:85C, , RoHS Compliant: Yes |
| H5MS5162FFR-E3M | 制造商:SK Hynix Inc 功能描述: |
| H5N1503P | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Silicon N Channel MOS FET High Speed Power Switching |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。