參數(shù)資料
型號(hào)： H5MS5162DFR-K3M
廠商： HYNIX SEMICONDUCTOR INC
元件分類： DRAM
英文描述： 32M X 16 DDR DRAM, 0.5 ns, PBGA60
封裝： 8 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, FBGA-60
文件頁(yè)數(shù)： 40/62頁(yè)
文件大?。?/td> 1314K
代理商： H5MS5162DFR-K3M
Rev 1.3 / Apr. 2009
45
11
Mobile DDR SDRAM 512Mbit (32M x 16bit)
H5MS5162DFR Series
Data for any WRITE burst may be truncated by a subsequent PRECHARGE command as shown in Figure.
Note that only data-in pairs that are registered prior to the tWR period are written to the internal array, and any subse-
quent data-in should be masked with DM, as shown in next Fig. Following the PRECHARGE command, a subsequent
command to the same bank cannot be issued until tRP is met.
Interrupting Write to Precharge
/CLK
CLK
WRITE
NOP
BA,
Col
b
Don't Care
1) DI b = Data In to column b .
2) An interrupted burst of 4 or 8 is shown, 2 data elements are written.
3) tWR is referenced from the positive clock edge after the last desired Data In pair.
4) A10 is LOW with the WRITE command (Auto Precharge is disabled)
5) *1 = can be Don't Care for programmed burst length of 4
6) *2 = for programmed burst length of 4, DQS becomes Don't Care at this point
Command
Address
DQS
DQ
PRE
DM
tDQSS
max
tWR
DI
b
*2
*1
BA
(A or All)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
H5MS5162DFR-L3M 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:512Mb (32Mx16bit) Mobile DDR SDRAM
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