參數(shù)資料
型號(hào): H5MS5162DFR-K3M
廠商: HYNIX SEMICONDUCTOR INC
元件分類(lèi): DRAM
英文描述: 32M X 16 DDR DRAM, 0.5 ns, PBGA60
封裝: 8 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, FBGA-60
文件頁(yè)數(shù): 4/62頁(yè)
文件大小: 1314K
代理商: H5MS5162DFR-K3M
Rev 1.3 / Apr. 2009
12
11
Mobile DDR SDRAM 512Mbit (32M x 16bit)
H5MS5162DFR Series
REGISTER DEFINITION III
Status Register (SR) for Mobile DDR SDRAM
Note)
1. The revision number starts at ‘0000’ and increments by ‘0001’ each time a change in the manufacturer’s specification, IBIS, or
process occurs.
2. Low temperature out of range.
3. High temperature out of range - no refresh rate can guarantee functionality.
4. The refresh rate multiplier is based on the memory’s temperature sensor.
5. Required average periodic refresh interval = tREFI * multiplier.
6. Status Register is only for Read.
7. To read out Status Register values, BA[1:0] set to 01b and A[12:0] set to all 0 with MRS command followed by Read command
with that BA[1:0] are Don’t care and A[12:0] set to all 0.
BA1
BA0
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
0
1
0
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
Density
-
DW
Refresh Rate
Revision Identification
Manufacturers Identification
0
1
0
X
X1)
0
1
0
Density
DQ15 DQ14 DQ13 Density
0
128
0
1
256
0
1
0
512
0
1
1024
1
0
Reserved
1
0
1
Reserved
1
0
Reserved
1
Reserved
DW (Device Width)
DQ11 Device Width
0
16 bits
1
32 bits
Refresh Rate
DQ10 DQ9
DQ8 Refresh Rate
0
x
42)
0
1
0
4
0
1
2
1
0
1
0
1
0.5
1
0
0.25
1
0.253)
Manufacturers Identification
DQ3
DQ2
DQ1
DQ0
Manufacturer
0
1
0
Hynix
x
Reserved or
other companies
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