參數(shù)資料
型號: DAC1617D1G0HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
封裝: DAC1617D1G0HN/C1<SOT813-3 (HVQFN72)|<<http://www.nxp.com/packages/SOT813-3.html<1<Always Pb-free,;DAC1617D1G0HN/C1<SOT813-3 (HVQFN72)|<<http://www.nxp.com/packages/SOT813
文件頁數(shù): 42/66頁
文件大?。?/td> 519K
代理商: DAC1617D1G0HN
DAC1617D1G0
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1.1 — 30 September 2011
42 of 66
NXP Semiconductors
DAC1617D1G0
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
06h
FREQNCO_B2
7 to 0
FREQ_NCO[23:16]
R/W
-
intermediate 8 bits for the NCO
frequency setting
intermediate 8 bits for the NCO
frequency setting
most significant 8 bits for the NCO
frequency setting
07h
FREQNCO_B3
7 to 0
FREQ_NCO[31:24]
R/W
-
08h
FREQNCO_B4
7 to 0
FREQ_NCO[39:32]
R/W
-
Table 25.
Default values are shown highlighted.
Address
Register
NCO frequency registers (address 04h to 08h) bit description
…continued
Bit
Symbol
Access
Value
Description
Table 26.
Default values are shown highlighted.
Address
Register
09h
PH_CORR_CTL0
DAC output phase correction registers (address 09h to 0Ah) bit description
Bit
7 to 0
Symbol
PHASE_COR[7:0]
Access
R/W
Value
Description
DAC output phase correction factor
(LSB)
least significant 8 bits for the DAC
output phase correction factor
DAC output phase correction control
DAC output phase correction
disabled
DAC output phase correction enabled
DAC output phase correction factor MSB
most significant 5 bits for the DAC
output phase correction factor
-
0Ah
PH_CORR_CTL1
7
PH_COR_ENA
R/W
0
1
4 to 0
PHASE_COR[12:8] R/W
00000
Table 27.
Default values are shown highlighted.
Address
Register
0Bh
DAC_A_DGAIN_LSB
Digital gain control registers (address 0Bh to 0Eh) bit description
Bit
7 to 0
Symbol
DAC_A_DGAIN[7:0]
Access
R/W
Value
Description
DAC A digital gain control
least significant 8 bits for the DAC
A digital gain
most significant 4 bits for the DAC
A digital gain
DAC B digital gain control
least significant 8 bits for the DAC
B digital gain
most significant 4 bits for the DAC
B digital gain
-
0Ch
DAC_A_DGAIN_MSB
3 to 0
DAC_A_DGAIN[11:8]
-
0Dh
DAC_B_DGAIN_LSB
7 to 0
DAC_B_DGAIN[7:0]
R/W
-
0Eh
DAC_B_DGAIN_MSB
3 to 0
DAC_B_DGAIN[11:8]
-
Table 28.
Default values are shown highlighted.
Bit
Symbol
3
A_DGAIN_E
Register DAC_OUT_CTRL (address 0Fh)
Access
R/W
Value
Description
DAC A digital gain control
disable
enable
0
1
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