參數(shù)資料
型號： DAC1627D1G25HN
廠商： NXP Semiconductors N.V.
元件分類： 外設(shè)及接口
英文描述： Dual 16-bit DAC, up to 1.25 Gsps; 2x 4x and 8x interpolating
封裝： DAC1627D1G25HN/C1<SOT813-3 (HVQFN72)|<<http://www.nxp.com/packages/SOT813-3.html<1<Always Pb-free,;
文件頁數(shù)： 1/69頁
文件大?。?/td> 1677K
代理商： DAC1627D1G25HN
1. General description
The DAC1627D1G25 is a high-speed 16-bit dual channel Digital-to-Analog Converter
(DAC) with selectable
×
2,
×
4 and
×
8 interpolating filters optimized for multi-carrier and
broadband wireless transmitters at sample rates of up to 1.25 Gsps. Supplied from a
3.3 V and a 1.8 V source, the DAC1627D1G25 integrates a differential scalable output
current up to 31.8 mA.
The DAC1627D1G25 is capable of meeting multi-carrier GSM specifications. For
example, with an output frequency of 150 MHz and a DAC clock frequency of 1.22 Gsps
the full-scale dynamic range is:
SFDR
RBW
= 85 dBc (bandwidth = 250 MHz)
IMD3 = 85 dBc
The Serial Peripheral Interface (SPI) provides full control of the DAC1627D1G25.
The DAC1627D1G25 integrates a Low Voltage Differential Signaling (LVDS) Double Data
Rate (DDR) receiver interface, with an on-chip 100
Ω
termination. The LVDS DDR
interface accepts a multiplex input data stream such as interleaved or folded. An internal
LVDS input auto-calibration ensures the robustness and stability of the interface.
Digital on-chip modulation converts the complex I and Q inputs from baseband to IF. The
mixer frequency is set by a 40-bit Numerically Controlled Oscillator (NCO). High resolution
internal gain, phase and offset control provide outstanding image and Local Oscillator
(LO) signal rejection at the system analog modulator output.
An inverse (sin x) / x function ensures a controlled flatness 0.5 dB for high bandwidths at
the DAC output.
Multiple device synchronization allows synchronization of the outputs of multiple DAC
devices. MDS guarantees a maximum skew of one output clock period between several
devices.
The DAC1627D1G25 includes a very low noise capacitor-free integrated Phase-Locked
Loop (PLL) multiplier which generates a DAC clock rate
from the LVDS clock rate.
The DAC1627D1G25 is available in a HVQFN72 package (10 mm
×
10 mm).
DAC1627D1G25
Dual 16-bit DAC, LVDS interface, up to 1.25 Gsps, x2, x4 and
x8 interpolating
Rev. 1 — 29 April 2011
Objective data sheet
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DAC1627D1G25HN/C1, 功能描述:調(diào)節(jié)器/解調(diào)器 DUAL 16b 1.25GSPS to 1.25 Gsps RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel
DAC1627D1G25HN/C1,551 功能描述:調(diào)節(jié)器/解調(diào)器 Dual 16-bit DAC, up to 1.25 Gsps RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel
DAC1627D1G25HN-C1 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC1627D1G25HN-C18 制造商:Integrated Device Technology Inc 功能描述:HVQFN72 - Tape and Reel
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