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| 型號(hào)： | DAC1617D1G0HN |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating |
| 封裝： | DAC1617D1G0HN/C1<SOT813-3 (HVQFN72)|<<http://www.nxp.com/packages/SOT813-3.html<1<Always Pb-free,;DAC1617D1G0HN/C1<SOT813-3 (HVQFN72)|<<http://www.nxp.com/packages/SOT813 |
| 文件頁(yè)數(shù)： | 26/66頁(yè) |
| 文件大小： | 519K |
| 代理商： | DAC1617D1G0HN |
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DAC1617D1G0
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1.1 — 30 September 2011
26 of 66
NXP Semiconductors
DAC1617D1G0
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
10.9 Single SideBand Modulator (SSBM)
The SSBM is a quadrature modulator that enables mixing the I data and Q data with the
sine and cosine signals generated by the NCO to generate path A and path B
(see
Figure 19
).
The frequency of the NCO is programmed over 40 bits. NCO enables inverting the sine
component to operate a positive or negative, lower or upper SSB upconversion
(see register TXCFG in
Table 23
).
10.9.1
NCO in 40 bits
When using NCO, the frequency can be set over 40 bits by five registers, FREQNCO_B0
to FREQNCO_B4 (see
Table 25
).
The frequency is calculated with
Equation 1
.
(1)
H(6)
H(5)
H(4)
H(3)
H(2)
H(1)
H(0)
H(22)
H(23)
H(24)
H(25)
H(26)
H(27)
H(28)
773
+456
252
+128
58
+22
6
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Table 15: Interpolation filter coefficients
…continued
First interpolation filter
Lower
Upper
Value
Second interpolation filter
Lower
Upper
Third interpolation filter
Lower
Upper
Value
Value
Fig 19. SSBM principle
001aan575
+/
cos
A
B
I
sin
+/
sin
Q
cos
+/
f
NCO
M
--------------
f
s
2
=
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