參數(shù)資料
型號： CY7C63742-SC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 12 MHz, RISC MICROCONTROLLER, PDSO24
封裝： 0.300 INCH, PLASTIC, SOIC-24
文件頁數(shù)： 23/48頁
文件大?。?/td> 425K
代理商： CY7C63742-SC
PRELIMINARY
FO R
enCoRe USB CY7C63722/23
CY7C63742/43
3
TABLE OF CONTENTS (continued)
16.0 PS/2 OPERATION ....................................................................................................................... 24
17.0 SERIAL PERIPHERAL INTERFACE (SPI) .................................................................................25
17.1 Operation as an SPI Master ...................................................................................................... 26
17.2 Master SCK Selection ................................................................................................................ 26
17.3 Operation as an SPI Slave ........................................................................................................ 27
17.4 SPI Status and Control ..............................................................................................................27
17.5 SPI Interrupt ............................................................................................................................... 28
17.6 SPI modes for GPIO pins ..........................................................................................................28
18.0 12-BIT FREE-RUNNING TIMER ................................................................................................. 29
19.0 TIMER CAPTURE REGISTERS ................................................................................................. 30
20.0 PROCESSOR STATUS AND CONTROL REGISTER ............................................................... 32
21.0 INTERRUPTS .............................................................................................................................. 33
21.1 Interrupt Vectors ........................................................................................................................ 34
21.2 Interrupt Latency ....................................................................................................................... 35
21.3 Interrupt Sources ....................................................................................................................... 35
21.3.1 USB Bus Reset or PS/2 Activity ......................................................................................................35
21.3.2 Free Running Timer Interrupts ........................................................................................................ 35
21.3.3 USB Endpoint Interrupts .................................................................................................................. 35
21.3.4 SPI Interrupt ...................................................................................................................................... 35
21.3.5 Capture Timer Interrupts ................................................................................................................. 35
21.3.6 GPIO Interrupt ................................................................................................................................... 35
21.3.7 Wake-up Interrupt ............................................................................................................................. 37
22.0 USB MODE TABLES .................................................................................................................. 37
23.0 ABSOLUTE MAXIMUM RATINGS ............................................................................................. 40
24.0 DC CHARACTERISTICS ............................................................................................................ 41
25.0 SWITCHING CHARACTERISTICS ............................................................................................. 42
26.0 ORDERING INFORMATION .......................................................................................................47
27.0 PACKAGE DIAGRAMS ..............................................................................................................47
LIST OF FIGURES
Figure 8-1. Program Memory Space with Interrupt Vector Table .................................................. 11
Figure 9-1. Clock Oscillator On-chip Circuit ................................................................................... 14
Figure 9-2. Clock Configuration Register (Address 0xF8) ............................................................. 14
Figure 10-1. Watch Dog Reset (WDR) .............................................................................................. 16
Figure 12-1. Block Diagram of GPIO Port (one pin shown) ........................................................... 18
Figure 12-2. Port 0 Data (Address 0x00) .......................................................................................... 19
Figure 12-3. Port 1 Data (Address 0x01) .......................................................................................... 19
Figure 12-4. GPIO Port 0 Mode0 Register (Address 0x0A) ............................................................ 19
Figure 12-5. GPIO Port 0 Mode1 Register (Address 0x0B) ............................................................ 20
Figure 12-6. GPIO Port 1 Mode0 Register (Address 0x0C) ............................................................ 20
Figure 12-7. GPIO Port 1 Mode1 Register (Address 0x0D) ............................................................ 20
Figure 12-8. Port 2 Data Register (Address 0x02) .......................................................................... 20
Figure 13-1. USB Status and Control Register (Address 0x1F) .................................................... 21
Figure 14-1. USB Device Address Register (Address 0x10) .......................................................... 22
Figure 14-2. USB EP0 Mode Register (Address 0x12) .................................................................... 22
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