參數(shù)資料
型號(hào)： CY7C63742-SC
廠(chǎng)商： CYPRESS SEMICONDUCTOR CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 12 MHz, RISC MICROCONTROLLER, PDSO24
封裝： 0.300 INCH, PLASTIC, SOIC-24
文件頁(yè)數(shù)： 20/48頁(yè)
文件大?。?/td> 425K
代理商： CY7C63742-SC
PRELIMINARY
FO R
enCoRe USB CY7C63722/23
CY7C63742/43
27
17.3
Operation as an SPI Slave
In slave mode, the chip receives SCK from an external master on pin P0.7. Data from the master is shifted in on the MOSI pin
(P0.5), while data is being shifted out of the slave on the MISO pin (P0.6). In addition, the active LOW Slave Select must be
asserted to enable the slave for transmit. The Slave Select pin is P0.4. These pins must be configured in appropriate GPIO modes,
with the GPIO data register set to 1 to enable bypass mode selected for the MISO pin.
In Slave mode, writes to the SPI Data Register load the Transmit buffer. If the Slave Select is asserted (SS LOW) and the shift
register is not busy shifting a previous byte, the TX buffer contents will be automatically transferred into the shift register. If the
shift register is busy, the new byte will be loaded into the shift register only after the active byte has finished and is transferred to
the Receive Buffer. The new byte is then ready to be shifted out (shifting waits for SCK from the Master). If the Slave Select is
not active when the transmit buffer is loaded, data is not transferred to the shift register until Slave Select is asserted. The Transmit
Buffer Full (TBF) bit will be set HIGH until the transmit buffer’s data-byte is transferred to the shift register. Writing to the transmit
buffer while the TBF bit is HIGH will overwrite the old byte in the Transmit Buffer.
If the Slave Select is deasserted before a byte transfer is complete, the transfer is aborted and no interrupt is generated. Whenever
Slave Select is asserted, the transmit buffer is automatically reloaded into the shift register.
Clock phase and polarity must be selected to match the SPI master, using the CPHA and CPOL control bits (see Table 17-1 and
Figure 17-4).
The SPI slave logic continues to operate in suspend, so if the SPI interrupt is enabled, the device can go into suspend during a
SPI slave transaction, and it will wake up at the interrupt that signals the end of the byte transfer.
17.4
SPI Status and Control
The SPI control register is shown in Figure 17-3. The timing diagram in Figure 17-4 shows the clock and data states for the various
SPI modes.
7
6
5
4
3
2
1
0
R/W
TCMP
TBF
Mode[1]
Mode[0]
CPOL
CPHA
SCK Select [1] SCK Select [0]
Figure 17-3. SPI Control Register (Address 0x61)
Table 17-1. SPI Control Register Definitions
Bit(s)
Definition
Function
1:0
SCK Select
Master mode SCK frequency selection (no effect in Slave Mode):
00
2 Mbit/s
01
1 Mbit/s
10
0.5 Mbit/s
11
0.0625 Mbit/sec
2
CPHA
SPI Clock Phase (see Figure 17-4)
3
CPOL
SPI Clock Polarity (see Figure 17-4): 0 SCK idles LOW, 1 SCK idles HIGH
5:4
Comm
Modes
00
All Communications functions disabled (default)
01
SPI Master Mode
10
SPI Slave Mode
11
reserved
6
TBF
Transmit Buffer Full. TBF=1 indicates data in the transmit buffer has not transferred to the shift
register.
7
TCMP
Transfer Complete. TCMP is set to 1 by the hardware when 8 bit transfer is complete. This bit is
only cleared by firmware. The SPI interrupt is asserted at the same time TCMP is set to 1.
相關(guān)PDF資料
PDF描述
CY8C42123-24SXIT MULTIFUNCTION PERIPHERAL, PDSO8
CY8CLED16P01-28PVXI SPECIALTY MICROPROCESSOR CIRCUIT, PDSO28
CYW2332BCI PLL FREQUENCY SYNTHESIZER, 1200 MHz, QCC24
CYW255OXC 255 SERIES, LOW SKEW CLOCK DRIVER, 24 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
CYW256OXCT 256 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C63743C-PXC 功能描述:輸入/輸出控制器接口集成電路 USB Combo Lo Spd PS/2 Periphrl Cntrlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
CY7C63743C-QXC 功能描述:輸入/輸出控制器接口集成電路 LO Speed 3 Endpoint USB COM RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
CY7C63743C-SXC 功能描述:輸入/輸出控制器接口集成電路 USB Combo Lo Spd PS/2 Periphrl Cntrlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
CY7C63743C-SXCT 功能描述:輸入/輸出控制器接口集成電路 USB/PS/2 Combo LoSpd Peripheral Controlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
CY7C63743-PC 功能描述:IC MCU 8K LS USB/PS-2 24-DIP RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:enCoRe™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲(chǔ)器類(lèi)型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類(lèi)型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱(chēng):SP000314382
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*