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參數(shù)資料
| 型號(hào)： | CL-PD6710 |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 總線控制器 |
| 英文描述： | ISA-TOOPC-CARD HOST ADAPTERS |
| 中文描述： | PCMCIA BUS CONTROLLER, PQFP144 |
| 封裝： | VQFP-144 |
| 文件頁數(shù)： | 85/128頁 |
| 文件大?。?/td> | 1591K |
| 代理商： | CL-PD6710 |
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CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
85
PRELIMINARY DATA SHEET v3.1
DMA OPERATION (CL-PD6722 only)
14.4.1
Programming the DMA Request Pin from the Card
The CL-PD6722 allows selection of one from three PC Card interface inputs to be redefined as the DMA
request input, and it also allows programming of the active level of the selected input. This is done by set-
ting bits 7 and 6 of the
Extension Control 1
register to the desired values matching those of the DMA-
capable PC Card to be used.
Once this selection of DMA request input is complete, the PC Card interface is configured at the signal
level for DMA card interfacing.
The following table shows how the CL-PD6722 socket interface signals are redefined when a card is in
DMA card interface mode:
Figure 14-2. Card DMA Request and Acknowledge Handshake with Terminal Count
Notice that the DMA acknowledge to the card as -REG high is only active during the actual DMA read or
write card cycle. This means there is no mechanism to deassert DACK to the card: The card must under-
stand that receiving the first DMA cycle isits DMA acknowledgment.
Standard I/O Card
Interface Signal Name
DMA-Capable Card Interface
Signal Usage
When Signal Redefinition for DMA
Interface is Effective
-IOIS16
-IOIS16 or may be selected as the active-low
DMA request input
Extension Control 1
register bits 7-6 = ‘10’
(BVD2/)
-SPKR/-LED
-SPKR/-LED or may be selected as the
active-low DMA request input
Extension Control 1
register bits 7-6 = ‘11’
-INPACK
-INPACK or may be selected as the active-
low DMA request input
Extension Control 1
register bits 7-6 = ‘01’
-REG
-REG during standard cycles, active-high
DACK during DMA read/write cycles
Only during actual card DMA read or write
cycle
-OE
-OE during standard cycles, active-low -TC
during DMA write cycles
During DMA write cycles (that is, when
-REG is high and -IORD is low)
-WE
-WE during standard cycles, active-low -TC
during DMA read cycles
During DMA read cycles (that is, when -REG
is high and -IOWR is low)
-DREQ
DACK
a
PC Card
CL-PD6722
-REG
-IOIS16, -SPKR, or -INPACK
-IOIS16, -SPKR, or -INPACK
-REG
a
A DMA cycle isthe DMA acknowledge to the card.
-TC
-OE/-WE
-OE/-WE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CL-PD6722 | ISA-TOOPC-CARD HOST ADAPTERS |
| CL-PS6700 | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS6700-VC-A | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS7110-VC-A | Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | Low-Power System-on-a-Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLPD6710VCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6710-VC-B | 制造商:Cirrus Logic 功能描述:PCMCIA BUS CONTROLLER, PQFP144 |
| CLPD6720QCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6720-QC-B | 制造商: 功能描述: |
| CL-PD6720QC-B | 制造商:CIRR 功能描述:6720-QC-B 制造商:Cirrus Logic 功能描述:6720-QC-B |
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