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參數(shù)資料
| 型號(hào)： | CL-PD6710 |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 總線控制器 |
| 英文描述： | ISA-TOOPC-CARD HOST ADAPTERS |
| 中文描述： | PCMCIA BUS CONTROLLER, PQFP144 |
| 封裝： | VQFP-144 |
| 文件頁數(shù)： | 29/128頁 |
| 文件大?。?/td> | 1591K |
| 代理商： | CL-PD6710 |
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CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
29
PRELIMINARY DATA SHEET v3.1
INTRODUCTION
3.1.10
Write FIFO
To increase performance when writing to PC Cards,
two, independent, four-word-deep write FIFOs are
used. Writes to PC Cards will complete without wait
states until the FIFO is full. Register states should
not be changed until the write FIFO is empty.
3.1.11
Bus Sizing
The CL-PD67XX incorporates logic to automatically
detect its connection to 8- or 16-bit buses. This is
accomplished by sensing SBHE* input activity. If the
SBHE* pin is always high (that is, tied to ISA_VCC),
the CL-PD67XX operates in 8-bit mode where all
transfers occur on the lower data bus, bits 7:0. Any
occurrence of the SBHE* going low triggers the
CL-PD67XX to operate thereafter as a 16-bit device.
16-bit operation of the CL-PD67XX is properly trig-
gered when the SBHE* input is connected to the
system’s SBHE* signal. When the CL-PD67XX is
operating in 16-bit mode, all ISA bus transactions
are 16-bit whenever possible, even if installed PC
cards only support 8-bit transfers. In 16-bit mode,
the signals SBHE* and SA0 are used to specify the
width of the data transfer and the location of data on
the bus (which byte lane has the data) during 8-bit
transfers. The possible combinations for SBHE* and
SA0 are shown in
Table 3-2
and
Table 3-3
.
Table 3-2.
16-Bit Mode Operation
a
The SBHE* signal is pulled up. If the SBHE*
signal remains high, the CL-PD67XX causes
all transfers to occur on D[7:0] only.
Typically, there are three types of data transfers to
and from the CL-PD67XX:
G
16-Bit Transfer from 16-Bit Processor —
The
CPU puts the address on the bus. Then the
CL-PD67XX identifies the address on the bus as
either an 8- or 16-bit transfer. If the transfer is
identified as 16-bit, the host acknowledges with
the appropriate signal, either MEMCS16* or
IOCS16*. Data is transferred to/from the data
bus as a word on both byte lanes.
G
8-Bit Transfer from 16-Bit Processor —
The
CPU puts the address on the bus. Then the
CL-PD67XX identifies the address on the bus as
either an 8- or 16-bit transfer. In this case, the
transfer is identified as an 8-bit transfer. The host
queries SA0 and SBHE* to determine the byte
lane on which the transfer is to occur. The data is
transferred to/from the data bus (see
Table 3-2
).
G
8-Bit Transfer from 8-Bit Processor —
The
CPU puts the address on the bus. The host
determines that it will be an 8-bit transfer since
the SBHE* signal has been tied high. The
CL-PD67XX queries SA0 to determine if the byte
is odd/even. The data is transferred to/from the
Data bus (D[7:0]).
3.1.12
Programmable PC Card Timing
The Setup, Command, and Recovery time for the
PC Card bus is programmable (see
Chapter 10
).
The CL-PD67XX can be programmed to match the
timing requirements of any PC Card. There are two
sets of timing registers, Timer Set 0 and Timer Set 1,
that can be selected on a per-window basis for both
I/O and memory windows.
To be compatible with the 82365SL, the two timing
sets are programmed at the rising edge of
PWRGOOD to include normal-wait and one-wait-
state timing.
3.1.13
ATA Mode Operation
The CL-PD67XX supports direct connection to
AT-attached-interface hard drives. ATA drives use
an interface very similar to the IDE interface found
on many popular portable computers. In this mode,
the address and data conflict with the floppy drive is
handled automatically. See
Chapter 11
for more
information.
16-Bit Mode Transfer Types
SBHE*
SA0
Word
0
0
Upper Byte/Odd Address
0
1
Low Byte/Even Address
1
0
Not Valid
1
1
Table 3-3.
8-Bit Mode Operation
8-Bit Mode Transfer Types
a
SA0
Even Address
0
Odd Address
1
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| CL-PD6722 | ISA-TOOPC-CARD HOST ADAPTERS |
| CL-PS6700 | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS6700-VC-A | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS7110-VC-A | Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | Low-Power System-on-a-Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLPD6710VCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6710-VC-B | 制造商:Cirrus Logic 功能描述:PCMCIA BUS CONTROLLER, PQFP144 |
| CLPD6720QCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6720-QC-B | 制造商: 功能描述: |
| CL-PD6720QC-B | 制造商:CIRR 功能描述:6720-QC-B 制造商:Cirrus Logic 功能描述:6720-QC-B |
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