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參數(shù)資料
| 型號(hào)： | CL-PD6710 |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類(lèi)： | 總線控制器 |
| 英文描述： | ISA-TOOPC-CARD HOST ADAPTERS |
| 中文描述： | PCMCIA BUS CONTROLLER, PQFP144 |
| 封裝： | VQFP-144 |
| 文件頁(yè)數(shù)： | 18/128頁(yè) |
| 文件大小： | 1591K |
| 代理商： | CL-PD6710 |
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PRELIMINARY DATA SHEET v3.1
CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
18
PIN INFORMATION
-WAIT
Wait
: This input indicates to the
CL-PD67XX that the current card
access cycle is to be extended until
this signal becomes inactive (high).
55
54
116
1
I-PU
2 or 3
–
-CD[2:1]
Card Detect
: These inputs indicate to
the CL-PD67XX the presence of a
card in the socket. They are pulled
high internally in the chip.
70, 10
69, 10
132, 73
2
I-PU
1
–
-CE[2:1]
Card Enable
: These outputs are
driven low by the CL-PD67XX during
card access cycles to control
byte/word card access. -CE1 enables
even-numbered address bytes and
-CE2 enables odd-numbered address
bytes. When configured for 8-bit cards,
only -CE1 will be active and A0 will be
set to ‘1’ for odd-byte accesses.
25, 22
22, 19
86, 83
2
O-TS
2 or 3
2 mA
RESET
Reset
: This output will be high to reset
the card and low for normal operation. To
reduce power consumption of idle cards
and to prevent reset glitches to a card,
this signal is high-impedance unless a
card is fully seated in the socket and
card interface signals are enabled.
51
51
114
1
O-TS
2 or 3
2 mA
BVD2/
-SPKR/
-LED
Battery Voltage Detect 2 / Speaker /
LED
: In Memory Card Interface mode,
this input serves as the BVD2 or bat-
tery warning status input.
In I/O Card Interface mode, this input
can be configured as a card’s -SPKR
binary audio input. For disk-drive sup-
port, BVD2/-SPKR/-LED can also be
configured as a drive-status LED input.
In DMA mode, this pin can be pro-
grammed as the -DREQ input from a
DMA-capable PC Card.
60
59
122
1
I-PU
2 or 3
–
Table 2-2.
Socket Interface Pins
(cont.)
Pin Name
1
Description
2
Pin Number
Qty
.
I/O
Pwr.
Drive
CL-PD6710
CL-PD6722
Socket A
Socket B
1
To differentiate the sockets, all CL-PD6722 pin names have either A_ or B_ prepended to the pin names indicated. For
example, A_A[25:0] and B_A[25:0] are the independent address buses to the sockets.
2
When a socket is configured as an ATA drive interface, socket interface pin functions change. See
Table 11-1 on page 75
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CL-PD6722 | ISA-TOOPC-CARD HOST ADAPTERS |
| CL-PS6700 | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS6700-VC-A | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS7110-VC-A | Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | Low-Power System-on-a-Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLPD6710VCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6710-VC-B | 制造商:Cirrus Logic 功能描述:PCMCIA BUS CONTROLLER, PQFP144 |
| CLPD6720QCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6720-QC-B | 制造商: 功能描述: |
| CL-PD6720QC-B | 制造商:CIRR 功能描述:6720-QC-B 制造商:Cirrus Logic 功能描述:6720-QC-B |
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