參數(shù)資料
型號: CL-PD6710
廠商: CIRRUS LOGIC INC
元件分類: 總線控制器
英文描述: ISA-TOOPC-CARD HOST ADAPTERS
中文描述: PCMCIA BUS CONTROLLER, PQFP144
封裝: VQFP-144
文件頁數(shù): 100/128頁
文件大?。?/td> 1591K
代理商: CL-PD6710
PRELIMINARY DATA SHEET v3.1
CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
100
ELECTRICAL SPECIFICATIONS
Figure 15-6. Memory Read/Write Timing
Table 15-13. Word I/O Read/Write Timing
Symbol
Parameter
MIN
MAX
Units
t
1
-REG or Address setup to Command active
1
(S
×
Tcp) – 10
ns
t
2
Command pulse width
2
(C
×
Tcp) – 10
ns
t
3
Address hold and Write Data valid from Command inactive
3
(R
×
Tcp) – 10
ns
t
4
-WAIT active from Command active
4
(C – 2)Tcp – 10
ns
t
5
Command hold from -WAIT inactive
(2 Tcp) + 10
ns
t
ref
Card -IOIS16 delay from valid Address (PC Card specification)
35
ns
t
6
-IOIS16 setup time before Command end
(3 Tcp) + 10
ns
t
7
-CE2 delay from -IOIS16 active
5
Tcp – 10
ns
t
6
Data valid from -WAIT inactive
Tcp + 10
ns
t
9
Data setup before -IORD inactive
(2 Tcp) + 10
ns
t
10
Data hold after -IORD inactive
0
ns
1
The Setup time is determined by the value programmed into the
Setup Timing
register, index 3Ah/3Dh. Using the Timer
Set 0 default value of 01h, the setup time would be 70 ns. S = (N
pres
×
N
val
+ 1), see page
98
.
2
The Command time is determined by the value programmed into the
Command Timing
register, index 3Bh/3Eh. Using
the Timer Set 0 default value of 06h, the Command time would be 270 ns. C = (N
pres
×
N
val
+ 1), see page
98
.
3
The Recovery time is determined by the value programmed into the
Recovery Timing
register, index 3Ch/3Fh. Using the
Timer Set 0 default value of 03h, the hold (Recovery) time would be 150 ns. R = (N
pres
×
N
val
+ 1), see page
98
.
4
For typical active timing programmed at 280 ns, maximum -WAIT timing is 190 ns after Command active.
5
-IOIS16 must go low within 3Tcp + 10 ns of the cycle beginning or -IOIS16 will be ignored and -CE will not be activated.
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