參數(shù)資料
型號: CL-PD6710
廠商: CIRRUS LOGIC INC
元件分類: 總線控制器
英文描述: ISA-TOOPC-CARD HOST ADAPTERS
中文描述: PCMCIA BUS CONTROLLER, PQFP144
封裝: VQFP-144
文件頁數(shù): 104/128頁
文件大?。?/td> 1591K
代理商: CL-PD6710
PRELIMINARY DATA SHEET v3.1
CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
104
ELECTRICAL SPECIFICATIONS
Figure 15-10. 16-Bit System to 8-Bit I/O Card: Odd Byte Timing
Table 15-16.16-Bit System to 8-Bit I/O Card: Odd Byte Timing
Symbol
Parameter
MIN
MAX
Units
t
1
Address change to -IOIS16 inactive
4
(3Tcp) + 10
ns
t
2
-IOIS16 inactive to -CE2 inactive
20
ns
t
3
-IOIS16 inactive to -CE1 active
20
ns
t
4
Address setup to Command active
1
(S
×
Tcp) – 10
ns
t
5
Command pulse width
2
(C
×
Tcp) – 10
ns
t
6
Address hold from Command inactive
3
(R
×
Tcp) – 10
ns
1
The Setup time is determined by the value programmed into the
Setup Timing
register, index 3Ah/3Dh. Using the Timer
Set 0 default value of 01h, the setup time would be 70 ns. S = (N
pres
×
N
val
+ 1), see page
98
.
2
The Command time is determined by the value programmed into the
Command Timing
register, index 3Bh/3Eh. Using
the Timer Set 0 default value of 06h, the Command time would be 270 ns. C = (N
pres
×
N
val
+ 1), see page
98
.
3
The Recovery time is determined by the value programmed into the
Recovery Timing
register, index 3Ch/3Fh. Using the
Timer Set 0 default value of 03h, the hold (Recovery) time would be 150 ns. R = (N
pres
×
N
val
+ 1), see page
98
.
4
-IOIS16 level from card should be valid before -IOWR/-IORD goes active. For a typical setup time of 70 ns, a PC Card
meeting the PCMCIA specification for -IOIS16 from A[25:0] change will meet this condition.
-REG,
A[25:0]
-IOIS16
t
3
-CE1
-CE2
D[7:0]
Odd Data
t
2
Write Cycle
D[7:0]
Read Cycle
Odd Data
D[15:8]
Read or
Write Cycle
XX
-IOWR, -IORD
t
4
t
5
t
6
t
1
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