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參數(shù)資料
| 型號(hào)： | CL-PD6710 |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 總線控制器 |
| 英文描述： | ISA-TOOPC-CARD HOST ADAPTERS |
| 中文描述： | PCMCIA BUS CONTROLLER, PQFP144 |
| 封裝： | VQFP-144 |
| 文件頁(yè)數(shù)： | 62/128頁(yè) |
| 文件大?。?/td> | 1591K |
| 代理商： | CL-PD6710 |
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PRELIMINARY DATA SHEET v3.1
CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
62
EXTENSION REGISTERS
Bit 5 — Three-State Bit 7
This bit enables floppy change bit compatibility.
Bit 6 — DMA System (CL-PD6722 only)
On the CL-PD6710, this bit is reserved.
On the CL-PD6722, this bit is used to configure system interface signals for normal or DMA oper-
ation. At reset, the signals IRQ9, IRQ10, and -VPP_VALID are in non-DMA mode, and this bit is
set to ‘0’. When this bit is set to ‘1’, the IRQ9, IRQ10, and -VPP_VALID pins are reconfigured for
system bus DMA interfacing. Refer to
Chapter 14
for a functional description of these pins during
DMA operation.
Bit 7 — IRQ15 Is RI Out
This bit determines the function of the IRQ15 pin. When configured for ring indicate, IRQ15 is used
to resume a processor with NMI or SMI such as an 82486SL when a high-to-low change is detect-
ed on the -STSCHG pin.
0
1
Normal operation.
For socket I/O at address 03F7h and 0377h, do not drive bit 7.
0
1
Configured for non-DMA mode on the CL-PD6722.
Configured for DMA mode on the CL-PD6722.
0
1
Normal IRQ15 operation.
IRQ15 is connected to Ring Indicate pin on the host processor.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CL-PD6722 | ISA-TOOPC-CARD HOST ADAPTERS |
| CL-PS6700 | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS6700-VC-A | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS7110-VC-A | Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | Low-Power System-on-a-Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLPD6710VCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6710-VC-B | 制造商:Cirrus Logic 功能描述:PCMCIA BUS CONTROLLER, PQFP144 |
| CLPD6720QCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6720-QC-B | 制造商: 功能描述: |
| CL-PD6720QC-B | 制造商:CIRR 功能描述:6720-QC-B 制造商:Cirrus Logic 功能描述:6720-QC-B |
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