
CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
73
PRELIMINARY DATA SHEET v3.1
TIMING REGISTERS
10.2 Command Timing 0–1
There are two separate Command Timing registers, each with identical fields. These registers are located
at the following indexes:
Index
3Bh
3Eh
Command Timing
Command Timing 0
Command Timing 1
The Command Timing register for each timing set controls how long a PC Card cycle’s command (that is,
-OE, -WE, -IORD, -IOWR; see
page 16
) active time will be, in terms of the number of internal clock cycles.
The overall command timing length Cis programmed by selecting a 2-bit prescaling value (bits 7:6 of this
register) representing weights of 1, 16, 256, or 8192, and then selecting a multiplier value (bits 5:0) to
which that prescalar is multiplied to produce the overall command timing length according to the following
formula:
C
= (
N
pres
×
N
val
) + 1
Equation 10-2
The value of C representing the number of internal clock cycles for a command, is then multiplied by the
internal clock’s period to determine the command active time (see
Section 15.3.6
for further discussion).
Bits 5:0 — Command Multiplier Value
This field indicates an integer value N
val
from 0 to 63; it is combined with a prescalar value (bits
7:6) to control the length that a command is active.
Bits 7:6 — Command Prescalar Select
This field chooses one of four prescalar values N
pres
that are combined with the value of the Com-
mand Multiplier Value (bits 5:0) to control the length that a command is active.
a
Timing set 0 (index 3Bh) resets to 06h for socket timing equal to standard AT-bus-based cycle times. Timing set 1 (3Eh) resets
to 0Fh for socket timings equal to standard AT-bus timing using one additional wait state.
Register Name:
Command Timing 0–1
Index:
3Bh, 3Eh
Bit
7
Bit
6
Register Per: socket
Register Compatibility Type: 365
Bit
1
Bit
5
Bit
4
Bit
3
Bit
2
Bit
0
Command Prescalar Select
Command Multiplier Value
RW:00
RW:000110/001111
a
00
01
10
11
N
pres
= 1
N
pres
= 16
N
pres
= 256
N
pres
= 8192