- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379891 > CL-PD6710 (CIRRUS LOGIC INC) ISA-TOOPC-CARD HOST ADAPTERS PDF資料下載
參數(shù)資料
| 型號(hào)： | CL-PD6710 |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 總線控制器 |
| 英文描述： | ISA-TOOPC-CARD HOST ADAPTERS |
| 中文描述： | PCMCIA BUS CONTROLLER, PQFP144 |
| 封裝： | VQFP-144 |
| 文件頁(yè)數(shù)： | 78/128頁(yè) |
| 文件大小： | 1591K |
| 代理商： | CL-PD6710 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)當(dāng)前第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)
PRELIMINARY DATA SHEET v3.1
CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
78
USING GPSTB PINS FOR EXTERNAL PORT CONTROL
(CL-PD6722 only)
Bit 4 controls use of the respective GPSTB pin as a write strobe for an external general-purpose latch.
When the respective extended index is set to 0Ah and the index register is set to the respective 2Fh or
6Fh setting, I/O writes that access address 3E1h will result in the respective GPSTB signal being driven
active for the duration of the ISA bus IOW* signal being driven low.
Bit 3 controls use of the respective GPSTB pin a read strobe for an external general-purpose buffer. When
the respective extended index is set to 0Ah and the index register is set to the respective 2Fh or 6Fh set-
ting, I/O reads that access address 3E1h will result in the respective GPSTB signal being driven active
for the duration of the ISA bus IOR* signal being driven low.
Bit 2 cause the GPSTB output to be totem-pole instead of the default open-collector configuration. When
GPSTB outputs are totem-pole, their ‘high’ level is driven to the voltage of the ‘+5V’ pin, instead of to high-
impedance.
If neither bit 3 nor bit 4 is set, the respective GPSTB pin functions as a reserved input in a CL-PD6722
that is an internal pull-up to the ‘+5V’ pin. This internal pull-up is turned off whenever the GPSTB pin is
configured as a general-purpose strobe, or when the respective socket’s Pull-up Control bit is set to ‘1’.
Bits 7:6 and 1:0 are reserved and must be programmed to ‘0’. These bits should not be used as scratch-
pad bits.
External Data Port Access through the External Data Register
Data to be accessed from an external read or write port is mapped to the respective
External Data
reg-
ister at Extended Index 0Ah. This allows external data to be accessed as if it were a register in the
CL-PD67XX register set.
To achieve this mapping, the external data port’s buffer or latch data connections should be made to
SD[15:8] of the system bus for 16-bit systems, and to SD[7:0] of the system bus for 8-bit systems.
To support readback of data written to an external I/O port by use of a GPSTB pin, a shadow of the exter-
nal data register exists, which is read when an I/O read is done from the external data register location
corresponding to a GPSTB pin programmed as a write strobe.
For more information on the Socket A and Socket B versions of this register, see the description of this
register in Section 9.7.4 and Section 9.7.5.
Register Name:
External Data
Index:
2Fh
Bit
7
Extended Index:
0Ah
Bit
4
Register Per: socket
Register Compatibility Type: ext.
Bit
1
Bit
6
Bit
5
Bit
3
Bit
2
Bit
0
External Data
7
External Data
6
External Data
5
External Data
4
External Data
3
External Data
2
External Data
1
External Data
0
RW:0
RW:0
RW:0
RW:0
RW:0
RW:0
RW:0
RW:0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CL-PD6722 | ISA-TOOPC-CARD HOST ADAPTERS |
| CL-PS6700 | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS6700-VC-A | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS7110-VC-A | Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | Low-Power System-on-a-Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLPD6710VCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6710-VC-B | 制造商:Cirrus Logic 功能描述:PCMCIA BUS CONTROLLER, PQFP144 |
| CLPD6720QCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6720-QC-B | 制造商: 功能描述: |
| CL-PD6720QC-B | 制造商:CIRR 功能描述:6720-QC-B 制造商:Cirrus Logic 功能描述:6720-QC-B |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。