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參數(shù)資料
| 型號： | CL-PD6710 |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 總線控制器 |
| 英文描述： | ISA-TOOPC-CARD HOST ADAPTERS |
| 中文描述： | PCMCIA BUS CONTROLLER, PQFP144 |
| 封裝： | VQFP-144 |
| 文件頁數(shù)： | 23/128頁 |
| 文件大小： | 1591K |
| 代理商： | CL-PD6710 |
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CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
23
PRELIMINARY DATA SHEET v3.1
INTRODUCTION
Each of the five memory windows has several programming options, including:
Each of the two I/O windows has several programming options, including:
CAUTION:
The windows of the CL-PD67XX should never be allowed to overlap with each other or the other devices
in the system. This would cause collisions in the IOCS16*, MEMCS16*, IOCHRDY, and SD[15:0] sig-
nals, resulting in erratic behavior.
Memory
Window Option
Description
Enabled
Each of the five memory windows can be individually enabled. Disabled windows are not responded
to.
Start Address
The starting address of the window is programmable on 4-Kbyte boundaries starting at 64 Kbytes
(1000h) with a maximum address of 16 Mbyte.
End Address
The ending address of the window is programmable on 4-Kbyte boundaries starting at 64 Kbytes
(1000h) with a maximum address of 16 Mbyte. Only memory accesses between the starting and
ending address are responded to.
Offset Address
The offset address is added to the ISA address to determine the address for accessing the PC Card.
This allows the addresses in the PC Card address space to be different from the ISA address space.
Data Size
The size of accesses can be set manually to either 8 or 16 bits.
Timing
The timing of accesses (Setup/Command/Recovery) can be set by either of two timing register sets:
Timer Set 0 or Timer Set 1.
Register Access
Setting
The -REG pin can be enabled on a per-window basis so that any of the windows can be used for
accessing attribute memory.
Write Protect
If the window is programmed to be write-protected, then writes to the memory window are ignored
(reads are still performed normally).
I/O
Window Option
Description
Enabled
Each of the two I/O windows can be individually enabled.
Start Address
The starting address of the window is programmable on single-byte boundaries from 0 to 64 Kbytes.
End Address
The ending address of the window is also programmable on single-byte boundaries from 0 to 64
Kbytes.
Offset Address
The offset address is added to the ISA address to determine the address for accessing the PC Card.
Auto Size
The size of accesses can be set automatically, based on the PC Card -IOIS16 signal.
Data Size
The size of accesses can be set manually to either 8 or 16 bits, overriding the Auto Size option.
Timing
The timing of accesses (Setup/Command/Recovery) can be set by either of two timing register sets:
Timer Set 0 or Timer Set 1.
相關PDF資料 |
PDF描述 |
|---|---|
| CL-PD6722 | ISA-TOOPC-CARD HOST ADAPTERS |
| CL-PS6700 | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS6700-VC-A | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS7110-VC-A | Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | Low-Power System-on-a-Chip |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CLPD6710VCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6710-VC-B | 制造商:Cirrus Logic 功能描述:PCMCIA BUS CONTROLLER, PQFP144 |
| CLPD6720QCB | 制造商:CIRRUS 功能描述:* |
| CL-PD6720-QC-B | 制造商: 功能描述: |
| CL-PD6720QC-B | 制造商:CIRR 功能描述:6720-QC-B 制造商:Cirrus Logic 功能描述:6720-QC-B |
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