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參數(shù)資料
| 型號(hào)： | celeron processor |
| 廠商： | Intel Corp. |
| 英文描述： | 32 bit Celeron Processor Mobile Module(32 位帶移動(dòng)模塊處理器) |
| 中文描述： | 32位賽揚(yáng)處理器的移動(dòng)模塊（32位帶移動(dòng)模塊處理器） |
| 文件頁數(shù)： | 3/64頁 |
| 文件大?。?/td> | 799K |
| 代理商： | CELERON PROCESSOR |
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243357-004
Datasheet
iii
Celeron
Processor Mobile Module MMC-2
at 650 MHz, 600 MHz, 550 MHz, 500 MHz, and 450 MHz
Contents
1.0
Introduction.........................................................................................................................1
1.1
References............................................................................................................1
2.0
Architecture Overview........................................................................................................2
3.0
Signal Information ..............................................................................................................4
3.1
Signal Definitions...................................................................................................4
3.1.1
Signal List.................................................................................................4
3.1.2
Memory Signal Description ......................................................................5
3.1.3
AGP Signals.............................................................................................6
3.1.4
PCI Signals...............................................................................................8
3.1.5
Processor and PIIX4E/M Sideband Signals...........................................10
3.1.6
Power Management Signals ..................................................................11
3.1.7
Clock Signals..........................................................................................12
3.1.8
Voltage Signals ......................................................................................13
3.1.9
ITP and JTAG Pins.................................................................................14
3.1.10 Miscellaneous Pins.................................................................................14
3.2
Connector Pin Assignments................................................................................15
3.3
Pin and Pad Assignments...................................................................................17
4.0
Functional Description......................................................................................................19
4.1
Celeron Processor Mobile Module......................................................................19
4.2
L2 Cache.............................................................................................................19
4.3
The 82443BX Host Bridge System Controller.....................................................19
4.3.1
Memory Organization.............................................................................19
4.3.2
Reset Strap Options...............................................................................20
4.3.3
PCI Interface ..........................................................................................20
4.3.4
AGP Interface.........................................................................................21
4.4
Power Management............................................................................................21
4.4.1
Clock Control Architecture......................................................................21
4.4.1.1 Normal State .............................................................................23
4.4.1.2 Auto Halt State ..........................................................................23
4.4.1.3 Stop Grant State........................................................................24
4.4.1.4 Quick Start State .......................................................................24
4.4.1.5 HALT/Grant Snoop State ..........................................................25
4.4.1.6 Sleep State................................................................................25
4.4.1.7 Deep Sleep State ......................................................................25
4.5
Power Consumption in Power Management Modes...........................................26
5.0
Electrical Specifications....................................................................................................28
5.1
System Bus Clock Signal Quality Specifications.................................................28
5.1.1
BCLK DC Specifications.........................................................................28
5.1.2
BCLK AC Specifications.........................................................................28
5.2
System Power Requirements..............................................................................30
5.3
Processor Core Voltage Regulation....................................................................30
5.3.1
Voltage Regulator Efficiency..................................................................30
5.3.2
Voltage Regulator Control......................................................................32
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