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參數(shù)資料
| 型號(hào)： | CD1865 |
| 廠商： | Intel Corp. |
| 英文描述： | Intelligent Eight-Channel Communications Controller |
| 中文描述： | 智能八通道通信控制器 |
| 文件頁(yè)數(shù)： | 86/150頁(yè) |
| 文件大?。?/td> | 871K |
| 代理商： | CD1865 |
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CD1865
—
Intelligent Eight-Channel Communications Controller
86
Datasheet
8.5
Global Register Initialization
The user must initialize the CD1865 by programming the following Global registers before starting
normal operations on the ports
—
Prescaler Period registers, the Global Interrupt Vector register,
and the three Service Match registers ().
8.6
Service Request Initialization
To prepare the CD1865 for service requests the following registers must be initialized:
Global register (GVR)
three Service Match registers ()
Global Channel registers (GCR)
The Global Vector register consists of five bits of user-supplied information, and three bits of
CD1865
–
supplied service request group information. This concatenated vector supplied by the
CD1865 during a service-request-acknowledgment cycle directs the host to the proper service
request subroutine. The host writes the five MSBs into the GVR during initialization. These five
bits can be either a device ID number or an appropriate code for handling service request. In
multiple-cascaded CD1865 applications, these five bits must have a unique value for each CD1865
to identify which CD1865 is responding to a service request cycle.
Three registers in the Global register set
—
Modem Service Match register (), Transmit Service
Match register (), and Receive Service Match register () store the service request values for the
three types of service requests. These levels are used to match with the value that appears on the
address bus during a service-request-acknowledgment cycle. Since these levels are system
dependent, the user must initialize these registers with the proper values.
The following three registers provide the channel number of the channel requesting service
—
GCR1, GCR2, and GCR3. Reading any of these registers causes the CD1865 to
‘
mask-in
’
three
bits specifying the channel number of the currently active channel. Normally these registers are
read by the host when it is handling a service request. In this case, the three bits are the number of
the channel requesting service. If any of the three GCR registers are read when the CD1865 is not
in a service request context, the three bits are the current value in the CAR.
Bits 4:2 are masked into the contents of these registers by the CD1865 when it is read by the host.
The actual contents of the register are not modified.
These three registers are provided as a convenience to the user. In most applications the user only
uses one of these locations and sets the register to an arbitrary value. However, in some cases it
may be useful to be able to record information about the state of the CD1865 (or the software
driving it) that is associated with each of the three service request types. In this case, the user may
store required information in the unused bits. When entering a service routine, the software can
check these bits (a
‘
sub-vector
’
) to read recorded states.
8.7
Prescaler
The Prescaler Period register (PPR) determines the fundamental
‘
tick
’
rate for all CD1865 on-
device timers, the Receiver Data Time-out and Transmitter Real-time Delay Timers. The PPR
counts Clock (CLK) periods, and the minimum PPR value used must guarantee a
‘
tick
’
length of
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