參數(shù)資料
型號： BX805565130P
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： 64-BIT, MICROPROCESSOR, BGA771
封裝： LGA-771
文件頁數(shù)： 26/40頁
文件大?。?/td> 200K
代理商： BX805565130P
32
Dual-Core Intel Xeon Processor 5100 Series Specification Update
AG65.
Performance Monitoring Event FP_ASSIST May Not be Accurate
Problem:
Performance monitoring event FP_ASSIST (11H) may be inaccurate as assist events
may be counted twice per actual assist in the following specific cases:
FADD and FMUL instructions with a NaN (Not a Number) operand and a memory
operand
FDIV instruction with zero operand value in memory
In addition, an assist event may be counted when DAZ (Denormals-Are-Zeros) and FTZ
(Flush-To-Zero) flags are turned on even though no actual assist occurs.
Implication: The counter value for the performance monitoring event FP_ASSIST (11H) may be
larger than expected. The size of the error is dependent on the number of occurrences
of the above conditions while the event is active.
Workaround: None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
AG66.
CPL-Qualified BTS May Report Incorrect Branch-From Instruction
Record From Address
Problem:
CPL (Current Privilege Level)-qualified BTS (Branch Trace Store) may report incorrect
branch-from instruction record From address under the following conditions:
Either BTS_OFF_OS[9] or BTS_OFF_USR[10] is selected in IA32_DEBUGCTL MSR
(1D9H)
Privilege-level transitions occur between CPL > 0 and CPL 0 or vice versa.
Implication: Due to this erratum, the From address reported by BTS may be incorrect for the
described conditions.
Workaround: None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
AG67.
PEBS Does Not Always Differentiate Between CPL-Qualified Events
Problem:
Performance monitoring counter configured to sample PEBS (Precise Event Based
Sampling) events at a certain privilege level may count samples at the wrong privilege
level.
Implication: Performance monitoring counter may be higher than expected for CPL-qualified events.
Do not use performance monitoring counters for precise event sampling when the
precise event is dependent on the CPL value.
Workaround: None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
AG68.
PMI May be Delayed to Next PEBS Event
Problem:
After a PEBS (Precise Event-Based Sampling) event, the PEBS index is compared with
the PEBS threshold, and the index is incremented with every event. If PEBS index is
equal to the PEBS threshold, a PMI (Performance Monitoring Interrupt) should be
issued. Due to this erratum, the PMI may be delayed by one PEBS event.
Implication: Debug Store Interrupt Service Routines may observe delay of PMI occurrence by one
PEBS event.
Workaround: None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
Problem:
exiting CC3/CC4 low power states and continuing program execution.
Implication: When this erratum occurs, the processor may livelock, resulting in a system hang.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
相關(guān)PDF資料
PDF描述
BX805573060 64-BIT, 2400 MHz, MICROPROCESSOR, CBGA775
BX80562X3210SLACU 64-BIT, 266 MHz, MICROPROCESSOR, PBGA775
BX80616I5660SLBLV 64-BIT, 133 MHz, MICROPROCESSOR, PBGA1156
BXA10-48D15-S DC to DC Converter
BXA10-48S05 EMI FILTER INCLUDING ESD PROTECTION
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
BX805565140P S LABN 制造商:Intel 功能描述:MPU Xeon 制造商:Intel 功能描述:MPU Xeon? Processor 5140 RISC 64-Bit 65nm 2.33GHz 1.35V/1.5V 771-Pin FCLGA6 Box
BX805565148A S LABH 制造商:Intel 功能描述:MPU Xeon
BX805565160A S L9RT 制造商:Intel 功能描述:MPU Xeon? Processor 5160 RISC 64-Bit 65nm 3GHz 1.35V/1.5V 771-Pin FCLGA6 Box
BX805565160A S LABS 制造商:Intel 功能描述:MPU Xeon? Processor 5160 RISC 64-Bit 65nm 3GHz 1.35V/1.5V 771-Pin FCLGA6 Box
BX805565160P S LAG9 制造商:Intel 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*