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參數(shù)資料
| 型號： | BX805565130P |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, MICROPROCESSOR, BGA771 |
| 封裝： | LGA-771 |
| 文件頁數(shù)： | 14/40頁 |
| 文件大?。?/td> | 200K |
| 代理商： | BX805565130P |
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Dual-Core Intel Xeon Processor 5100 Series Specification Update
21
Workaround: If the last page of the positive canonical address space is not allocated for code (4K
page at 00007ffffffff000 or 2M page at 00007fffffe00000) then the problem cannot
occur.
Status:
For the steppings affected, see the Summary Tables of Changes.
AG23.
VMCALL to Activate Dual-monitor Treatment of SMIs and SMM Ignores
Reserved Bit settings in VM-exit Control Field
Problem:
Processors supporting Intel Virtualization Technology can execute VMCALL from within
the Virtual Machine Monitor (VMM) to activate dual-monitor treatment of SMIs and
SMM. Due to this erratum, if reserved bits are set to values inconsistent with VMX
Capability MSRs, VMCALL may not VMFail.
Implication: VMCALL executed to activate dual-monitor treatment of SMIs and SMM may not VMFail
due to incorrect reserved bit settings in VM-Exit control field.
Workaround: Software should ensure that all VMCS reserved bits are set to values consistent with
VMX Capability MSRs.
Status:
For the steppings affected, see the Summary Tables of Changes.
AG24.
The PECI Controller Resets to the Idle State
Problem:
After reset, the Platform Environment Control Interface (PECI) client controller should
first identify a PECI bus idle condition and only then search for the first rising edge. Due
to this erratum, the processor PECI controller resets into the "Idle Detected" state upon
processor reset. If another PECI device on the platform is attempting to send a
message as the processor PECI controller comes out of reset, the processor PECI
controller will typically experience a Frame Check Sequence error and move to the idle
state. Rarely, the processor PECI controller may interpret that the message was
intended for it and try to reply. In this case a message may be corrupted but this
situation will be caught and handled by the PECI error handling protocol.
Implication: The processor PECI controller resets to an incorrect state but the error handling
capability of PECI will resolve the situation so that the processor will be able to respond
to an incoming message immediately after reset and will not disregard an incoming
message that arrives before an idle bus is formally detected.
Workaround: No workaround is necessary due to the PECI error handling protocol.
Status:
For the steppings affected, see the Summary Tables of Changes.
AG25.
Power Cycle Generator Bus Transactions Will Not Be Counted As Local
Transactions
Problem:
The following Bus Transaction Performance Monitor events are supposed to count all
local transactions:
BUS_TRANS_ IO (Event: 6Ch)
BUS_TRANS_ANY (Event: 70h)
Due to this erratum when the BUS_TRANS_IO and BUS_TRANS_ANY events with Agent
Specificity clear (Umask bit[13]=0), Power Cycle Generator events such as hardware
coordination IORead and StopGrant are not counted as local transactions.
Implication: Power Cycle Generator bus transactions may not be counted as local transactions when
bus transaction performance monitor events are enabled
Workaround: None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
AG26.
Premature Execution of a Load Operation Prior to Exception Handler
Invocation
Problem:
If any of the below circumstances occur it is possible that the load portion of the
instruction will have executed before the exception handler is entered.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BX805565140P S LABN | 制造商:Intel 功能描述:MPU Xeon 制造商:Intel 功能描述:MPU Xeon? Processor 5140 RISC 64-Bit 65nm 2.33GHz 1.35V/1.5V 771-Pin FCLGA6 Box |
| BX805565148A S LABH | 制造商:Intel 功能描述:MPU Xeon |
| BX805565160A S L9RT | 制造商:Intel 功能描述:MPU Xeon? Processor 5160 RISC 64-Bit 65nm 3GHz 1.35V/1.5V 771-Pin FCLGA6 Box |
| BX805565160A S LABS | 制造商:Intel 功能描述:MPU Xeon? Processor 5160 RISC 64-Bit 65nm 3GHz 1.35V/1.5V 771-Pin FCLGA6 Box |
| BX805565160P S LAG9 | 制造商:Intel 功能描述: |
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