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CHAPTER 2 V
R
4120A
Preliminary User’s Manual S14767EJ1V0UM00
147
Table 2-53. ROM Addresses (When Using 32-bit Data Bus) (2/3)
Physical address
ADD[25:0] pin
When using 32-M ROM and
32-M extension ROM
(DBUS32 = 1, ROM64 = 0,
EXT_ROM64 = 0)
When using 64-M ROM and
32-M extension ROM
(DBUS32 = 1, ROM64 = 1,
EXT_ROM64 = 0)
0x1FFFFFFF to
0x1F800000
0x3FFFFFFF to
0x3800000
Bank 1 (ROMCS_B[1])
Bank 1 (ROMCS_B[1])
0x1F7FFFFF to
0x1F000000
0x37FFFFFF to
0x3000000
Bank 0 (ROMCS_B[0])
0x1EFFFFF to
0x1E800000
0x2FFFFFF to
0x2800000
Bank 3 (ROMCS_B[3])
Bank 0 (ROMCS_B[0])
0x1E7FFFFF to
0x1E000000
0x27FFFFF to
0x2000000
Bank 2 (ROMCS_B[2])
0x1DFFFFFF to
0x1D800000
0x1FFFFFF to
0x1800000
ROM space reserved for future use
Bank 3 (ROMCS_B[3])
Note
0x1D7FFFFF to
0x1D000000
0x17FFFFF to
0x1000000
Bank 2 (ROMCS_B[2])
Note
0x1CFFFFFF to
0x18000000
0x0FFFFFF to
0x0000000
ROM space reserved for future use
Note
Can be used exclusively from the extension DRAM
Table 2-53. ROM Addresses (When Using 32-bit Data Bus) (3/3)
Physical address
ADD[25:0] pin
When using 32-M ROM and 64-M
extension ROM
(DBUS32 = 1, ROM64 = 0,
EXT_ROM64 = 1)
When using 64-M ROM and 64-M
extension ROM (DBUS32 = 1,
ROM64 = 1, EXT_ROM64 = 1)
0x1FFFFFFF to
0x1F800000
0x3FFFFFFF to
0x3800000
Bank 1 (ROMCS_B[1])
Bank 1 (ROMCS_B[1])
0x1F7FFFFF to
0x1F000000
0x37FFFFFF to
0x3000000
Bank 0 (ROMCS_B[0])
0x1EFFFFFF to
0x1E000000
0x2FFFFFF to
0x2000000
Bank 3 (ROMCS_B[3])
Bank 0 (ROMCS_B[0])
0x1DFFFFFF to
0x1D000000
0x1FFFFFF to
0x1000000
Bank 2 (ROMCS_B[2])
Bank 3 (ROMCS_B[3])
Note
0x1CFFFFFF to
0x1C000000
0x0FFFFFF to
0x0000000
ROM space reserved for future use
Bank 2 (ROMCS_B[2])
Note
0x1BFFFFFF to
0x18000000
0x3FFFFFF to
0x0000000
ROM space reserved for future use
Note
Can be used exclusively from the extension DRAM