參數(shù)資料
型號: ST7FLIT19B
廠商: 意法半導(dǎo)體
英文描述: 8-Bit MCU With Single Voltage Flash Memory, Data EEPROM, ADC, 5 Timers, SPI(內(nèi)部RC,PLL,ADC,ROP,ICP, IAP,SPI的8位MCU)
中文描述: 8位微控制器單電壓閃存存儲器,數(shù)據(jù)EEPROM,模數(shù)轉(zhuǎn)換器,5計(jì)時(shí)器和SPI(內(nèi)部鋼筋,鎖相環(huán),藝發(fā)局,人事,電感,國際檢察官聯(lián)合會的SPI的8位微控制器)
文件頁數(shù): 94/155頁
文件大小: 2968K
代理商: ST7FLIT19B
ST7LITE1xB
94/155
1
11.5 10-BIT A/D CONVERTER (ADC)
11.5.1 Introduction
The on-chip Analog to Digital Converter (ADC) pe-
ripheral is a 10-bit, successive approximation con-
verter with internal sample and hold circuitry. This
peripheral has up to 7 multiplexed analog input
channels (refer to device pin out description) that
allow the peripheral to convert the analog voltage
levels from up to 7 different sources.
The result of the conversion is stored in a 10-bit
Data Register. The A/D converter is controlled
through a Control/Status Register.
11.5.2 Main Features
10-bit conversion
Up to 7 channels with multiplexed input
Linear successive approximation
Data register (DR) which contains the results
Conversion complete status flag
On/off bit (to reduce consumption)
The block diagram is shown in
Figure 60
.
11.5.3 Functional Description
11.5.3.1 Analog Power Supply
V
DDA
and V
SSA
are the high and low level refer-
ence voltage pins. In some devices (refer to device
pin out description) they are internally connected
to the V
DD
and V
SS
pins.
Conversion accuracy may therefore be impacted
by voltage drops and noise in the event of heavily
loaded or badly decoupled power supply lines.
Figure 60. ADC Block Diagram
CH2
CH1
EOC SPEEDADON
0
CH0
ADCCSR
AIN0
AIN1
ANALOG TO DIGITAL
CONVERTER
AIN6
ANALOG
MUX
D4
D3
D5
D9
D8
D7
D6
D2
ADCDRH
3
D1
D0
ADCDRL
0
0
0
CAL
0
R
ADC
C
ADC
HOLD CONTROL
x 1 or
x 8
AMPSEL
bit
SEL
f
ADC
f
CPU
0
1
1
0
DIV 2
DIV 4
SLOW
bit
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