參數(shù)資料
型號: ST7FLIT19B
廠商: 意法半導(dǎo)體
英文描述: 8-Bit MCU With Single Voltage Flash Memory, Data EEPROM, ADC, 5 Timers, SPI(內(nèi)部RC,PLL,ADC,ROP,ICP, IAP,SPI的8位MCU)
中文描述: 8位微控制器單電壓閃存存儲器,數(shù)據(jù)EEPROM,模數(shù)轉(zhuǎn)換器,5計時器和SPI(內(nèi)部鋼筋,鎖相環(huán),藝發(fā)局,人事,電感,國際檢察官聯(lián)合會的SPI的8位微控制器)
文件頁數(shù): 64/155頁
文件大?。?/td> 2968K
代理商: ST7FLIT19B
ST7LITE1xB
64/155
1
DUAL 12-BIT AUTORELOAD TIMER 4
(Cont’d)
Long Input Capture
Pulses that last more than 8
μ
s can be measured
with an accuracy of 4
μ
s if f
OSC
= 8MHz in the fol-
lowing conditions:
– The 12-bit AT4 Timer is clocked by the Lite Timer
(RTC pulse: CK[1:0] = 01 in the ATCSR register)
– The ICS bit in the ATCSR2 register is set so that
the LTIC pin is used to trigger the AT4 Timer cap-
ture.
– The signal to be captured is connected to LTIC
pin
– Input Capture registers LTICR, ATICRH and
ATICRL are read
This configuration allows to cascade the Lite Timer
and the 12-bit AT4 Timer to get a 20-bit input cap-
ture value. Refer to
Figure 45
.
Figure 45. Long Range Input Capture Block Diagram
Notes:
1.
Since the input capture flags (ICF) for both tim-
ers (AT4 Timer and LT Timer) are set when signal
transition occurs, software must mask one inter-
rupt by clearing the corresponding ICIE bit before
setting the ICS bit.
2.
If the ICS bit changes (from 0 to 1 or from 1 to
0), a spurious transition might occur on the input
capture signal because of different values on LTIC
and ATIC. To avoid this situation, it is recommend-
ed to do as follows:
– First, reset both ICIE bits.
– Then set the ICS bit.
– Reset both ICF bits.
– And then set the ICIE bit of desired interrupt.
3
. How to compute a pulse length with long input
capture feature.
As both timers are used, computing a pulse length
is not straight-forward. The procedure is as fol-
lows:
– At the first input capture on the rising edge of the
pulse, we assume that values in the registers are
as follows:
LTICR = LT1
ATICRH = ATH1
ATICRL = ATL1
Hence ATICR1 [11:0] = ATH1 & ATL1
Refer to
Figure 46 on page 65
.
LTIC
ATIC
ICS
1
0
12-bit Input Capture Register
OFF
f
cpu
32MHz
f
LTIMER
12-bit Upcounter1
12-bit AutoReload Register
8-bit Input Capture Register
8-bit Timebase Counter1
f
OSC/32
LTICR
CNTR1
ATICR
ATR1
8 LSB bits
12 MSB bits
LITE TIMER
12-Bit ARTIMER
20
cascaded
bits
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