參數(shù)資料
型號： ST72331
廠商： 意法半導體
英文描述： 8-Bit MCU with 8 to 16K ROM/OTP/EPROM, 256 EEPROM, 384 to 512 Bytes RAM, ADC, WDG, SCI, SPI and 2 Timers(8位微控制器(8M))
中文描述： 8位微控制器與8至16K的光碟/雙層/存儲器，256的EEPROM，384字節(jié)RAM為512，藝發(fā)局，水分散粒劑，脊髓損傷，SPI和2計時器（8位微控制器（8米））
文件頁數(shù)： 85/98頁
文件大?。?/td> 1123K
代理商： ST72331
85/98
ST72331
6.4 DC ELECTRICAL CHARACTERISTICS
(T
A
= -40°C to +85°C and V
DD
= 5V unless otherwise specified)
Notes:
1. Hysteresis voltage between switching levels. Based on characterisation results, not tested.
2. CPU running with memory access, no DC load or activity on I/O’s; clock input (OSCIN) driven by external square wave.
3. No DC load or activity on I/O’s; clock input (OSCIN) driven by external square wave.
4. Except OSCIN and OSCOUT
5. WAIT Mode with SLOW Mode selected. Based on characterisation results, not tested.
6.5 PERIPHERAL CHARACTERISTICS
Notes:
1. The safe reset cannot be guaranted by the LVD when fosc is greater than 8MHz.
2. Based on characterisation results, not tested.
Symbol
Parameter
Test Conditions
Value
Unit
Min.
Typ.
Max.
V
IL
Input Low Level Voltage
All Input pins
Input High Level Voltage
All Input pins
Hysteresis Voltage
1)
All Input pins
Low Level Output Voltage
All Output pins
3V < V
DD
< 6V
V
DD
x 0.3
V
V
IH
3V < V
DD
< 6V
V
DD
x 0.7
V
V
HYS
400
mV
V
OL
I
OL
= +10μA
I
OL
= + 2mA
I
OL
= +10μA
I
OL
= +10mA
I
OL
= + 20mA
I
OH
= - 10μA
I
OH
= - 2mA
V
IN
= V
SS
(No Pull-up configured)
V
IN
= V
DD
0.1
0.4
0.1
1.5
3.0
V
Low Level Output Voltage
High Sink I/O pins
V
OH
High Level Output Voltage
All Output pins
Input Leakage Current
All Input pins but RESET
4)
Input Leakage Current
RESET pin
4.9
4.2
V
I
IL
I
IH
0.1
1.0
μ
A
I
IH
V
IN
= V
DD
0.1
1.0
R
ON
Reset Weak Pull-up R
ON
V
IN
> V
IH
V
IN
< V
IL
f
OSC
= 4 MHz, f
CPU
= 2 MHz
f
OSC
= 8 MHz, f
CPU
= 4 MHz
f
OSC
= 16 MHz, f
CPU
= 8 MHz
f
OSC
= 4 MHz, f
CPU
= 125 kHz
f
OSC
= 8 MHz, f
CPU
= 250 kHz
f
OSC
= 16 MHz, f
CPU
= 500 kHz
f
OSC
= 4MHz, f
CPU
= 2MHz
f
OSC
= 8MHz, f
CPU
= 4 MHz
f
OSC
= 16MHz, f
CPU
= 8 MHz
f
OSC
= 4 MHz, f
CPU
= 125 kHz
f
OSC
= 8 MHz, f
CPU
= 250 kHz
f
OSC
= 16 MHz, f
CPU
= 500 kHz
I
LOAD
= 0mA without LVD
I
LOAD
= 0mA with LVD
20
60
40
120
3.5
6
11
1.5
2.5
4.5
2
4
6.5
0.8
1
1.6
1
70
80
240
7
12
20
3
5
9
4
8
12
1.5
2
3.5
10
100
k
I
DD
Supply Current in
RUN Mode
2)
mA
Supply Current in SLOW
Mode
2)
mA
Supply Current in WAIT
Mode
3)
mA
Supply Current in WAIT-
MINIMUM Mode
5)
mA
Supply Current in HALT
Mode
μ
A
Low Voltage Detection Reset Electrical Specifications (Option)
Parameter
LVD Reset Trigger, V
DD
rising edge
LVD Reset Trigger, V
DD
falling edge
LVD Reset Trigger, hysteresis
2)
Symbol
V
LVDUP
V
LVDDOWN
V
LVDHYS
Conditions
Min.
Typ.
Max.
4.1
3.85
Unit
V
V
mV
f
OSC
= 8 MHz max
1)
.
3.35
250
147
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