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| 型號(hào)： | ST72331 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-Bit MCU with 8 to 16K ROM/OTP/EPROM, 256 EEPROM, 384 to 512 Bytes RAM, ADC, WDG, SCI, SPI and 2 Timers(8位微控制器(8M)) |
| 中文描述： | 8位微控制器與8至16K的光碟/雙層/存儲(chǔ)器，256的EEPROM，384字節(jié)RAM為512，藝發(fā)局，水分散粒劑，脊髓損傷，SPI和2計(jì)時(shí)器（8位微控制器（8米）） |
| 文件頁(yè)數(shù)： | 71/98頁(yè) |
| 文件大小： | 1123K |
| 代理商： | ST72331 |
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ST72331
SERIAL PERIPHERAL INTERFACE
(Cont’d)
4.6.4.7 Single Master and Multimaster Configurations
There are two types of SPI systems:
– Single Master System
– Multimaster System
Single Master System
A typical single master system may be configured,
using an MCU as the master and four MCUs as
slaves (see
Figure 43
).
The master device selects the individual slave de-
vices by using four pins of a parallel port to control
the four SS pins of the slave devices.
The SS pins are pulled high during reset since the
master device ports will be forced to be inputs at
that time, thus disabling the slave devices.
Note:
To prevent a bus conflict on the MISO line
the master allows only one slave device during a
transmission.
For more security, the slave device may respond
to the master with the received data byte. Then the
master will receive the previous byte back from the
slave device if all MISO and MOSI pins are con-
nected and the slave has not written its DR regis-
ter.
Other transmission security methods can use
ports for handshake lines or data bytes with com-
mand fields.
Multi-master System
A multi-master system may also be configured by
the user. Transfer of master control could be im-
plemented using a handshake method through the
I/O ports or by an exchange of code messages
through the serial peripheral interface system.
The multi-master system is principally handled by
the MSTR bit in the CR register and the MODF bit
in the SR register.
Figure 44. Single Master Configuration
MISO
MOSI
MOSI
MOSI
MOSI
MOSI
MISO
MISO
MISO
MISO
SS
SS
SS
SS
SS
SCK
SCK
SCK
SCK
SCK
5V
P
Slave
MCU
Slave
MCU
Slave
MCU
Slave
MCU
Master
MCU
VR02131E
133
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