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參數(shù)資料
| 型號： | ST72331 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-Bit MCU with 8 to 16K ROM/OTP/EPROM, 256 EEPROM, 384 to 512 Bytes RAM, ADC, WDG, SCI, SPI and 2 Timers(8位微控制器(8M)) |
| 中文描述： | 8位微控制器與8至16K的光碟/雙層/存儲器，256的EEPROM，384字節(jié)RAM為512，藝發(fā)局，水分散粒劑，脊髓損傷，SPI和2計時器（8位微控制器（8米）） |
| 文件頁數(shù)： | 15/98頁 |
| 文件大小： | 1123K |
| 代理商： | ST72331 |
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15/98
ST72331
CENTRAL PROCESSING UNIT
(Cont’d)
Stack Pointer (SP)
Read/Write
Reset Value: 01FFh
The Stack Pointer is a 16-bit register which is al-
ways pointing to the next free location in the stack.
It is then decremented after data has been pushed
onto the stack and incremented before data is
popped from the stack (see
Figure 8
).
Since the stack is 256 bytes deep, the 8th most
significant bits are forced by hardware. Following
an MCU Reset, or after a Reset Stack Pointer in-
struction (RSP), the Stack Pointer contains its re-
set value (the SP7 to SP0 bits are set) which is the
stack higher address.
The least significant byte of the Stack Pointer
(called S) can be directly accessed by a LD in-
struction.
Note:
When the lower limit is exceeded, the Stack
Pointer wraps around to the stack upper limit, with-
out indicating the stack overflow. The previously
stored information is then overwritten and there-
fore lost. The stack also wraps in case of an under-
flow.
The stack is used to save the return address dur-
ing a subroutine call and the CPU context during
an interrupt. The user may also directly manipulate
the stack by means of the PUSH and POP instruc-
tions. In the case of an interrupt, the PCL is stored
at the first location pointed to by the SP. Then the
other registers are stored in the next locations as
shown in
Figure 8
.
– When an interrupt is received, the SP is decre-
mented and the context is pushed on the stack.
– On return from interrupt, the SP is incremented
and the context is popped from the stack.
A subroutine call occupies two locations and an in-
terrupt five locations in the stack area.
Figure 8. Stack Manipulation Example
15
8
0
0
0
0
0
0
0
1
7
0
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
PCH
PCL
SP
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
SP
Y
CALL
Subroutine
Interrupt
Event
PUSH Y
POP Y
IRET
RET
or RSP
@ 01FFh
@ 0100h
Stack Higher Address = 01FFh
Stack Lower Address = 0100h
77
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相關(guān)代理商/技術(shù)參數(shù) |
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| ST72331J2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT MICROCONTROLLER (MCU) WITH 8/16K ROM/OTP/EPROM.256 EEPROM.384/512 BYTES RAM.ADC.WDG.SCI.SPI & 2 TIMERS - SDIP42/56. QFP44/64 |
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| ST72331J2B6/XXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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