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參數(shù)資料
| 型號(hào)： | ST72331 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-Bit MCU with 8 to 16K ROM/OTP/EPROM, 256 EEPROM, 384 to 512 Bytes RAM, ADC, WDG, SCI, SPI and 2 Timers(8位微控制器(8M)) |
| 中文描述： | 8位微控制器與8至16K的光碟/雙層/存儲(chǔ)器，256的EEPROM，384字節(jié)RAM為512，藝發(fā)局，水分散粒劑，脊髓損傷，SPI和2計(jì)時(shí)器（8位微控制器（8米）） |
| 文件頁(yè)數(shù)： | 76/98頁(yè) |
| 文件大?。?/td> | 1123K |
| 代理商： | ST72331 |
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ST72331
8-BIT A/D CONVERTER (ADC)
(Cont’d)
4.7.4 Register Description
CONTROL/STATUS REGISTER (CSR)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7 = COCO Conversion Complete.
This bit is set by hardware. It is cleared by soft-
ware reading the result in the DR register or writing
to the CSR register.
0: Conversion is not complete.
1: Conversion can be read from the DR register.
Bit 6 = Reserved. Must always be cleared.
Bit 5 = ADON A/D converter On.
This bit is set and cleared by software.
0: A/D converter is switched off.
1: A/D converter is switched on.
Note: a typically 30μs delay time is necessary for
the ADC to stabilize when the ADON bit is set.
Bit 4 = Reserved. Forced by hardware to 0.
Bit 3 = Reserved. Must always be cleared.
Bits 2-0: CH2-CH0 Channel Selection.
These bits are set and cleared by software. They
select the analog input to convert.
*
IMPORTANT NOTE:
The number of pins AND
the channel selection varies according to the de-
vice. REFER TO THE DEVICE PINOUT).
DATA REGISTER (DR)
Read Only
Reset Value: 0000 0000 (00h)
Bit 7:0 = AD7-AD0 Analog Converted Value.
This register contains the converted analog value
in the range 00h to FFh.
Reading this register reset the COCO flag.
Table 21. ADC Register Map
7
0
COCO
-
ADON
0
-
CH2
CH1
CH0
Pin*
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
CH2
0
0
0
0
1
1
1
1
CH1
0
0
1
1
0
0
1
1
CH0
0
1
0
1
0
1
0
1
7
0
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Address
(Hex.)
Register
Name
7
6
5
4
3
2
1
0
70
Reset Value
DR
AD7
0
AD6
0
AD5
0
AD4
0
AD3
0
AD2
0
AD1
0
AD0
0
71
Reset Value
CSR
COCO
0
-
0
ADON
0
0
0
-
0
CH2
0
CH1
0
CH0
0
138
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