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參數(shù)資料
| 型號： | SPEAR-09-B042 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 100M bps, I2C BUS CONTROLLER, PBGA289 |
| 封裝： | 15 X 15 MM, 1.70 MM HEIGHT, ROHS COMPLIANT, LFBGA-289 |
| 文件頁數(shù)： | 43/66頁 |
| 文件大小： | 917K |
| 代理商： | SPEAR-09-B042 |
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Standard customization
SPEAR-09-B042
Figure 11.
Type of data carried by the TDM
Two banks are used to exchange the samples with the processor. The number of sample
stored in a buffer is programmable.
When the TDM reads and stores the data in one bank, the processor is owner of the other
bank, allowing it to read the received data before writing a new buffer to be played.
The processor can compute the data directly in the buffer.
When the two banks are switched, this can generate either an interrupt or a DMA transfer.
When this event occurs, if the processor has not finished to compute the previous input
buffer and to store the new output buffer, the computation is out of real time. The software
must to check that operations are done in real time.
To avoid synchronization issues, the MSB of the buffer address can be managed by the
device itself, the processor always accessing the right bank at addresses 0x0000 to 0x3FFF.
9.4.6
I2S interface
The I2S block is very similar to TDM block, but the frame sync is limited to Philips I2S
definition.
The I2S block can be master or slave for the clock.
The I2S block can be master or slave for the sync signal.
Bufferization is limited to 1024 samples (512 left and 512 right samples representing 64 ms
of voice). Data is stored always on 32-bits. Left and right channels are stored in two different
buffers. Two banks are used to exchange data with the processor.
The I2S interface is composed of 4 signals which are shown in Table 17.
Half frame
Narrowband companded
Narrowband linear
Wideband companded
Wideband linear
frame
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相關代理商/技術參數(shù) |
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| SPEAR-09-H022 | 制造商:STMicroelectronics 功能描述: |
| SPEAR-09-H022_06 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr Head200 ARM 926, 200K customizable eASIC gates, large IP portfolio SoC |
| SPEAR-09-H042 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr⑩ Head200, ARM 926, 200 K customizable eASIC⑩ gates, large IP portfolio SoC |
| SPEAR-09-H122 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr⑩ Head600 |
| SPEAR-09-H122_08 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr⑩ Head600 |
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