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參數(shù)資料
| 型號： | SPEAR-09-B042 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 100M bps, I2C BUS CONTROLLER, PBGA289 |
| 封裝： | 15 X 15 MM, 1.70 MM HEIGHT, ROHS COMPLIANT, LFBGA-289 |
| 文件頁數(shù)： | 25/66頁 |
| 文件大?。?/td> | 917K |
| 代理商： | SPEAR-09-B042 |
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SPEAR-09-B042
Main blocks
8.13.1
PLL block diagram
Figure 7.
PLL block diagram
8.13.2
Normal mode
In this mode, an 8-bit feedback divider is used. The PLL output frequency is always a
multiple of the input frequency.
8.13.3
Fractional mode
In this mode, a 16-bit feedback divider and a more sophisticated control logic is used. The
output frequency can have any value.
8.13.4
Double side dithering mode
This mode is based on the fractional mode. Frequency modulation (triangular shape) is
applied to reduce the EMI. For example, if the fundamental frequency is 300 MHz and the
modulation is set to 5% the output frequency varies from 285 MHz to 315 MHz.
8.13.5
Single side dithering mode
This mode is similar to the double side dithering mode, but it takes the fundamental
frequency as the maximum value allowing a simplified calculation of all the system
frequencies (DDR timing). For example, setting the fundamental frequency to 300 MHz and
the modulation set to 5%, the output frequency varies from 270 MHz to 300 MHz.
VCO
PRE
Divider
Post
Divider
Feedback
Divider
Output clock
Input Clock
Phase
Comparator
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相關(guān)代理商/技術(shù)參數(shù) |
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| SPEAR-09-H022 | 制造商:STMicroelectronics 功能描述: |
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| SPEAR-09-H122 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr⑩ Head600 |
| SPEAR-09-H122_08 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr⑩ Head600 |
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