參數(shù)資料
型號: SPEAR-09-B042
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 100M bps, I2C BUS CONTROLLER, PBGA289
封裝: 15 X 15 MM, 1.70 MM HEIGHT, ROHS COMPLIANT, LFBGA-289
文件頁數(shù): 29/66頁
文件大小: 917K
代理商: SPEAR-09-B042
SPEAR-09-B042
Standard customization
9
Standard customization
9.1
Features
The following functionalities are implemented in the SPEAr BASIC standard customization:
8/16-bits parallel Flash interface allowing connection of NOR or NAND Flash
Possible NAND Flash booting
Up to 1024*768, 24-bits per pixel LCD controller, TFT and STN panels
SDIO interface supporting SPI, SD1, SD4 and SD8 mode with card detect, write
protect, LED control and interrupt capability.
9*9 keyboard controller
8 GPIOs with interrupt capability
Up to 1024 timeslots, master or slave TDM. Any input timeslot can be switched to any
output timeslot, and/or can be buffered for computation (up to 16 channels of 1 to 4
timeslots buffered during 30 ms). Up to 16 buffers can be played in output timeslots.
18 GPIOs for direct (up to 8) CODEC and/or (up to 8) SLIC management
I2S interface based on Philips protocol (data delayed by one bit only) allowing up to
64 ms data-buffer both for left and right channels. The I2S interface uses the same
memory than SDIO interface and usage is exclusive.
Second-order noise shaper with *32 to *256 over-sampling for binary or two’s
complement data. Outputs are complementary with 4 mA capability. DAC uses the
same memory then TDM bufferization leading to some limitations to work
simultaneously.
Camera interface ITU-601 with external or embedded synchronization (ITU-656 or
CSI2). Picture limit is given by the line length that must be stored in a 2048*32 buffer.
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