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參數(shù)資料
| 型號： | SPEAR-09-B042 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 100M bps, I2C BUS CONTROLLER, PBGA289 |
| 封裝： | 15 X 15 MM, 1.70 MM HEIGHT, ROHS COMPLIANT, LFBGA-289 |
| 文件頁數(shù)： | 39/66頁 |
| 文件大?。?/td> | 917K |
| 代理商： | SPEAR-09-B042 |
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Standard customization
SPEAR-09-B042
9.4.4
Keyboard interface
The keyboard interface uses 18 pins. These pins can be either used as standard GPIOs or
to drive a 9*9 keyboard (81 keys). The keyboard scan period can be adjusted between 10
ms and 80 ms.
When in keyboard mode, pressing a key generates an interrupt when enabled through the
IT_DMA block.
Two successive scan must be validated with the same key pressed before a key press is
detected. After detection, two “no key pressed” cycles must be observed before allowing a
new keypress detection.
Any new keypress event latches the data into the KBREG register and sets the interrupt bit,
even if the previously pressed key has not been read and the interrupt register cleared.
If several keys are pressed, only the first detected one is registered.
The pressed key value can be read through in the KBREG register. The interrupt is cleared
in the interrupt handler by clearing the STATUSREG register.
Table 15 shows the KBREG values.
Table 15.
KBREG coding
COL8
COL7
COL6
COL5
COL4
COL3
COL2
COL1
COL0
ROW8
80
79
78
77
76
75
74
73
72
ROW7
71
70
69
68
67
66
65
64
63
ROW6
62
61
60
59
58
57
56
55
54
ROW5
53
52
51
50
49
48
47
46
45
ROW4
44
43
42
41
40
39
38
37
36
ROW3
35
34
33
32
31
30
29
28
27
ROW2
26
25
24
23
22
21
20
19
18
ROW1
17
16
15
14
13
12
11
10
9
ROW0
87654
3210
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