參數(shù)資料
型號: SPEAR-09-B042
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 100M bps, I2C BUS CONTROLLER, PBGA289
封裝: 15 X 15 MM, 1.70 MM HEIGHT, ROHS COMPLIANT, LFBGA-289
文件頁數(shù): 28/66頁
文件大小: 917K
代理商: SPEAR-09-B042
Main blocks
SPEAR-09-B042
The following clocks can be used in the integrated logic:
Up to 5 external clocks provided through the device pins
4 separate clocks from the integrated frequency synthesizer
PLL1 frequency
PLL2 frequency
48 MHz (USB PLL)
24 MHz (Main oscillator)
32.768 KHz (RTC oscillator)
APB clock (programmable)
AHB clock (programmable)
Any of the GPIOs
8.20.2
Custom project development
The flow to develop a custom project to embed in the SPEAr BASIC device is similar to the
standard ASIC flow.
The configurable logic is an empty module of the whole system-on-chip. The pinout and the
maximum number of gates are fixed. The HDL project is synthesized using a dedicated
library and post synthesis simulation is possible to verify the custom net-list.
The verification procedure, after place and route phase, is the same as standard ASIC back
end flow.
8.20.3
Customization process
The layers used for the IP configuration range from 2 metal layers with 1 via, up to 4 metal
layers with 4 vias. Diffusion and remaining metal/vias are invariant across multiple custom
designs. Density and performance scale with the number of customization layers.
The configurable logic included in the SPEAr BASIC chip is a 300 Kgate equivalent array
when customized using 4 metals – 4 vias.
相關(guān)PDF資料
PDF描述
SPEAR300-2 32-BIT, FLASH, 333 MHz, RISC MICROCONTROLLER, PBGA289
SPL505YC264ATT PROC SPECIFIC CLOCK GENERATOR, PDSO64
SPL505YC264BT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO64
SPL505YC264BT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO64
SPW08F0D SINGLE COLOR LED, PURE WHITE, 3.5 mm
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