參數(shù)資料
型號： SPAK56F8346FV60
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 16-BIT, 240 MHz, OTHER DSP, PQFP144
封裝： 20 X 20 MM, 0.50 MM PITCH, 1.40 MM HEIGHT, PLASTIC, LQFP-144
文件頁數(shù)： 91/156頁
文件大?。?/td> 2219K
代理商： SPAK56F8346FV60
4
56F8346 Technical Data
MOTOROLA
Preliminary
Temperature Sensor, which can be tied to an analog input pin to monitor the on-chip temperature
Two four-input Quadrature Decoders or two additional Quad Timers
Four dedicated General Purpose Quad Timers totaling three dedicated pins: Timer C with one pin
and Timer D with two pins
Optional On-Chip Regulator
FlexCAN (CAN Version 2.0 B-compliant ) Module with 2-pin port for transmit and receive
Two Serial Communication Interfaces each with two pins (or four additional GPIO lines)
Up to two Serial Peripheral Interfaces (SPIs) with configurable 4-pin port (or eight additional GPIO
lines). SPI1 can also be used as Quadrature Decoder 1 or Quad Timer B
Computer-Operating Properly (COP) / Watchdog timer
Two dedicated external interrupt pins
62 General Purpose I/O (GPIO) pins
External reset input pin for hardware reset
External reset output pin for system reset
Integrated low-voltage interrupt module
JTAG/Enhanced On-Chip Emulation (OnCE) for unobtrusive, processor speed-independent,
real-time debugging
Software-programmable, Phase Lock Loop-based frequency synthesizer for the core clock
1.1.4
Energy Information
Fabricated in high-density CMOS with 5V-tolerant, TTL-compatible digital inputs
On-board 3.3V down to 2.6V voltage regulator for powering internal logic and memories; can be
disabled
On-chip regulators for digital and analog circuitry to lower cost and reduce noise
Wait and Stop modes available
ADC smart power management
Each peripheral can be individually disabled to save power
1.2 56F8346 Description
The 56F8346 is a member of the 56800E core-based family of hybrid controllers. It combines, on a single
chip, the processing power of a DSP and the functionality of a microcontroller with a flexible set of
peripherals to create an extremely cost-effective solution. Because of its low cost, configuration flexibility,
and compact program code, the 56F8346 is well-suited for many applications. The 56F8346 includes many
peripherals that are especially useful for applications such as motion control, smart appliances, steppers,
encoders, tachometers, limit switches, power supply and control, automotive control, engine management,
noise suppression, remote utility metering, industrial control for power, lighting, and automation.
The 56800E core is based on a Harvard-style architecture consisting of three execution units operating in
parallel, allowing as many as six operations per instruction cycle. The MCU-style programming model and
optimized instruction set allow straightforward generation of efficient, compact DSP and control code. The
instruction set is also highly efficient for C/C++ Compilers to enable rapid development of optimized
control applications.
The 56F8346 supports program execution from either internal or external memories. Two data operands can
be accessed from the on-chip data RAM per instruction cycle. The 56F8346 also provides two external
dedicated interrupt lines and up to 62 General Purpose Input/Output (GPIO) lines, depending on peripheral
configuration.
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