參數(shù)資料
型號： SPAK56F8346FV60
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 16-BIT, 240 MHz, OTHER DSP, PQFP144
封裝： 20 X 20 MM, 0.50 MM PITCH, 1.40 MM HEIGHT, PLASTIC, LQFP-144
文件頁數(shù)： 120/156頁
文件大小： 2219K
代理商： SPAK56F8346FV60
66
56F8346 Technical Data
MOTOROLA
Preliminary
Part 5 Interrupt Controller (ITCN)
5.1 Introduction
The Interrupt Controller (ITCN) module is used to arbitrate between various interrupt requests (IRQs) and
to signal to the 56800E core when an interrupt of sufficient priority exists and to what address to jump in
order to service this interrupt.
5.2 Features
The ITCN module design includes these distinctive features:
Programmable priority levels for each IRQ
Two programmable Fast Interrupts
Notification to SIM module to restart clocks out of Wait and Stop modes
Drives initial address on the address bus after reset
For further information, see Table 4-5, Interrupt Vector Table Contents.
5.3 Functional Description
The Interrupt Controller is a slave on the IPBus. It contains registers allowing each of the 82 interrupt
sources to be set to one of four priority levels, excluding certain interrupts of fixed priority. Next, all of the
interrupt requests of a given level are priority encoded to determine the lowest numerical value of the active
interrupt requests for that level. Within a given priority level, zero is the highest priority, while number 81
is the lowest.
5.3.1
Normal Interrupt Handling
Once the ITCN has determined that an interrupt is to be serviced and which interrupt has the highest priority,
an interrupt vector address is generated. Normal interrupt handling concatenates the VBA and the vector
number to determine the vector address. In this way, an offset is generated into the vector table for each
interrupt.
FCMB15_CONTROL
$B8
Message Buffer 15 Control/Status Register
FCMB15_ID_HIGH
$B9
Message Buffer 15 ID High Register
FCMB15_ID_LOW
$BA
Message Buffer 15 ID Low Register
FCMB15_DATA
$BB
Message Buffer 15 Data Register
FCMB15_DATA
$BC
Message Buffer 15 Data Register
FCMB15_DATA
$BD
Message Buffer 15 Data Register
FCMB15_DATA
$BE
Message Buffer 15 Data Register
Reserved
Table 4-38 FlexCAN Registers Address Map
(FC_BASE = $00F800) (Continued)
Register Acronym
Address Offset
Register Description
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