參數(shù)資料
型號： SPAK56F8346FV60
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 16-BIT, 240 MHz, OTHER DSP, PQFP144
封裝： 20 X 20 MM, 0.50 MM PITCH, 1.40 MM HEIGHT, PLASTIC, LQFP-144
文件頁數(shù)： 84/156頁
文件大?。?/td> 2219K
代理商： SPAK56F8346FV60
Introduction
MOTOROLA
56F8346 Technical Data
33
Preliminary
Part 4 Memory Map
4.1 Introduction
The 56F8346 device is a 16-bit motor-control chip based on the 56800E core. It uses a Harvard-style
architecture with two independent memory spaces for data and program. On-chip RAM and Flash memories
are used in both spaces.
This section provides memory maps for:
Program Address Space, including the Interrupt Vector Table
Data Address Space, including the EOnCE Memory and Peripheral Memory Maps
On-chip memory sizes for each device are summarized in Table 4-1. Flash memories’ restrictions are
identified in the “Use Restrictions” column of Table 4-1.
4.2 Program Map
The operating mode control bits (MA and MB) in the Operating Mode Register (OMR) control the Program
memory map. At reset, these bits are set as indicated in Table 4-2. Table 4-4 shows the memory map
configurations that are possible at reset. After reset, the OMR MA bit can be changed and will have an effect
on the P-space memory map, as shown in Table 4-3. Changing the OMR MB bit will have no effect.
Table 4-1 Chip Memory Configurations
On-Chip Memory
56F8346
Use Restrictions
Program Flash
128KB
Erase/Program via Flash interface unit and word writes to CDBW
Data Flash
8KB
Erase/Program via Flash interface unit and word writes to CDBW. Data
Flash can be read via either CDBR or XDB2, but not by both simultaneously
Program RAM
4KB
None
Data RAM
8KB
None
Program Boot Flash
8KB
Erase/Program via Flash Interface unit and word to CDBW
Table 4-2 OMR MA/MB Value at Reset
OMR MB =
Flash Secured
State1, 2
1.
This bit is only configured at reset. If the Flash secured state changes, this will not be reflected in MB until the next reset.
2.
Changing MB in software will not affect Flash memory security.
OMR MA =
EXTBOOT Pin
Chip Operating Mode
00
Mode 0 – Internal Boot; EMI is configured to use 16 address lines; Flash
Memory is secured; external P-space is not allowed; the EOnCE is disabled
01
Not valid; cannot boot externally if the Flash is secured and will actually
configure to 00 state
10
Mode 0 – Internal Boot; EMI is configured to use 16 address lines
11
Mode 1 – External Boot; Flash Memory is not secured; EMI configuration is
determined by the state of the EMI_MODE bit
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